Chinese semiconductor thread II

[tokenanalyst]

Looks like the work for vertical signal time reduction for chips have in the work for quite some time in China, this company has been working on similar concept since 2022, don't know if the company is connected to Huawei, maybe, but I don't think so, they are creating really advance packaging, bonding and 3D IC technology, looks like they started with stacked memory and they moved to logic. They already have one production line and a bigger one in construction by this year.
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The company offers key technologies such as copper-to-copper hybrid bonding (Cu-Cu), wafer thinning, high-precision alignment, and through-silicon via (TSV) drilling. These innovations enable the effective integration of memory chips with logic chips, achieving storage-computing convergence. This significantly enhances overall chip performance, broadens functional diversity, and provides robust support and strong impetus for expanding chip applications across multiple domains.

There are two technologies for wafer-on-wafer bonding: direct bonding and hybrid bonding.

Wafer to Wafer:
Wafer-on-wafer bonding comes in two main types: direct bonding and hybrid bonding. Hybrid bonding, such as copper-to-copper (Cu-Cu) bonding, connects wafers by forming metal layers on the wafer surface, during the bonding process, these layers create metallic bonds to join the wafers. Due to their excellent conductivity, they meet the demands for high-speed signal transmission in chips. Hybrid bonding requires precise alignment of the chips or circuit structures on the top and bottom wafers, with an accuracy reaching the sub-micron or even nanometer level. Subsequently, wafer thinning and Through-Silicon Via (TSV) techniques are used to directly penetrate through the silicon wafers, achieving tight stacking and interconnection between chips in the three-dimensional direction.

-By using wafer stacking technology, the integration density is increased by 1000 times.
-Depending on the application, we can provide various 3D wafer stacking processes such as F2F, F2B, 1+2, and 1+4.

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[tokenanalyst]

Suqian Liansheng plans to jointly establish an indium phosphide substrate company.​

On June 8, Suqian Liansheng issued an announcement stating that the company plans to sign a "Joint Venture Intent Agreement" with individual shareholder Zhu Ronghui and Huizhi Optoelectronics Artificial Intelligence Technology (Suzhou) Co., Ltd. The three parties will jointly invest RMB 10 million to establish a joint venture company (name to be determined), mainly engaged in the research, development, production and sales of indium phosphide substrates.

This move marks Suqian Liansheng's official entry into the field of compound semiconductor materials, further expanding its industrial layout in the direction of high-end electronic materials.

The announcement indicates that the project is planned to be constructed in two phases. Phase one involves a fixed asset investment of 100 million yuan, primarily covering factory renovation, production environment setup, equipment procurement, personnel recruitment, and obtaining necessary production permits. The construction period is 10 months. Upon completion of Phase one, it is expected to produce 120,000 4- to 6-inch indium phosphide substrates annually. Phase two construction will proceed as needed based on the progress of Phase one and market conditions, with an estimated additional investment of 200 million yuan. Upon completion of Phase two, the overall production capacity will expand to 400,000 indium phosphide substrates per year.

In terms of capacity planning, the project aims to gradually establish a complete capability from substrate materials to large-scale supply, to meet the continuous demand for indium phosphide substrates from downstream fields such as optical communication, data centers, and radio frequency devices.​

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[tokenanalyst]

More companies adopting advanced packaging for 3D integration.​

MicroNano Core and Cloudwise Intelligent Reach Strategic Cooperation | Building a New Ecosystem for Physical AI with In-Memory​

On June 6 , 2026 , the " Inclusive Simulation, Intelligent Innovation " Cloudwise 2026 User Ecosystem Conference was successfully held at the Zhongguancun National Innovation Demonstration Zone Exhibition Center in Beijing. More than 500 industry experts, company representatives, and partners gathered to witness this important moment for China's simulation and physics AI industry. At the conference,MicroNano Core and CloudWalk Intelligent officially signed a strategic cooperation agreementThe two parties will conduct in-depth collaboration on the application of in-memory computing chips in the simulation field, and jointly create a complete physical AI ecosystem from underlying computing power to application training .

Currently, the next generation of AI is moving from the digital world to the physical world, with physical AI becoming a core direction of industrial transformation. Training physical AI requires a large amount of high-quality physical simulation data, while the efficiency bottleneck of simulation computing calls for revolutionary innovations at the underlying computing power level.

Micro-nano core independently developed 3D -CIM™ LPU chip By breaking through the traditional von Neumann architecture with an innovative architecture , it achieves a leapfrog improvement in computing power and energy efficiency. As a leading simulation software company in China, Cloudwise's multiphysics simulation platform, Simdroid , is widely used in key areas such as electronic heat dissipation and chip multiphysics. In 2025 , Simdroid's electronic heat dissipation module license sales revenue ranked first in the Chinese electronic heat dissipation market.

In this strategic cooperation, both parties will fully leverage their respective strengths: In terms of architectural innovation, MicroNano Core's pioneering 3D-CIM™ LPU chip in-memory computing architecture provides high-performance, high-energy-efficiency underlying support for simulation calculations; regarding deep compatibility, both parties will jointly promote the integration of MicroNano Core chips with…Sim-PI, a physics AI development platform Deep hardware and software adaptation; in terms of ecosystem co-construction, we will work together to explore more possibilities of GPU- accelerated simulation and create a complete physical AI ecosystem from ontology to training to deployment .

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