Chinese semiconductor thread II

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tokenanalyst

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Looks like the work for vertical signal time reduction for chips have in the work for quite some time in China, this company has been working on similar concept since 2022, don't know if the company is connected to Huawei, maybe, but I don't think so, they are creating really advance packaging, bonding and 3D IC technology, looks like they started with stacked memory and they moved to logic. They already have one production line and a bigger one in construction by this year.
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The company offers key technologies such as copper-to-copper hybrid bonding (Cu-Cu), wafer thinning, high-precision alignment, and through-silicon via (TSV) drilling. These innovations enable the effective integration of memory chips with logic chips, achieving storage-computing convergence. This significantly enhances overall chip performance, broadens functional diversity, and provides robust support and strong impetus for expanding chip applications across multiple domains.

There are two technologies for wafer-on-wafer bonding: direct bonding and hybrid bonding.

Wafer to Wafer:
Wafer-on-wafer bonding comes in two main types: direct bonding and hybrid bonding. Hybrid bonding, such as copper-to-copper (Cu-Cu) bonding, connects wafers by forming metal layers on the wafer surface, during the bonding process, these layers create metallic bonds to join the wafers. Due to their excellent conductivity, they meet the demands for high-speed signal transmission in chips. Hybrid bonding requires precise alignment of the chips or circuit structures on the top and bottom wafers, with an accuracy reaching the sub-micron or even nanometer level. Subsequently, wafer thinning and Through-Silicon Via (TSV) techniques are used to directly penetrate through the silicon wafers, achieving tight stacking and interconnection between chips in the three-dimensional direction.

-By using wafer stacking technology, the integration density is increased by 1000 times.
-Depending on the application, we can provide various 3D wafer stacking processes such as F2F, F2B, 1+2, and 1+4.

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Suqian Liansheng plans to jointly establish an indium phosphide substrate company.​

On June 8, Suqian Liansheng issued an announcement stating that the company plans to sign a "Joint Venture Intent Agreement" with individual shareholder Zhu Ronghui and Huizhi Optoelectronics Artificial Intelligence Technology (Suzhou) Co., Ltd. The three parties will jointly invest RMB 10 million to establish a joint venture company (name to be determined), mainly engaged in the research, development, production and sales of indium phosphide substrates.

This move marks Suqian Liansheng's official entry into the field of compound semiconductor materials, further expanding its industrial layout in the direction of high-end electronic materials.

The announcement indicates that the project is planned to be constructed in two phases. Phase one involves a fixed asset investment of 100 million yuan, primarily covering factory renovation, production environment setup, equipment procurement, personnel recruitment, and obtaining necessary production permits. The construction period is 10 months. Upon completion of Phase one, it is expected to produce 120,000 4- to 6-inch indium phosphide substrates annually. Phase two construction will proceed as needed based on the progress of Phase one and market conditions, with an estimated additional investment of 200 million yuan. Upon completion of Phase two, the overall production capacity will expand to 400,000 indium phosphide substrates per year.

In terms of capacity planning, the project aims to gradually establish a complete capability from substrate materials to large-scale supply, to meet the continuous demand for indium phosphide substrates from downstream fields such as optical communication, data centers, and radio frequency devices.​

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More companies adopting advanced packaging for 3D integration.​

MicroNano Core and Cloudwise Intelligent Reach Strategic Cooperation | Building a New Ecosystem for Physical AI with In-Memory​

On June 6 , 2026 , the " Inclusive Simulation, Intelligent Innovation " Cloudwise 2026 User Ecosystem Conference was successfully held at the Zhongguancun National Innovation Demonstration Zone Exhibition Center in Beijing. More than 500 industry experts, company representatives, and partners gathered to witness this important moment for China's simulation and physics AI industry. At the conference,MicroNano Core and CloudWalk Intelligent officially signed a strategic cooperation agreementThe two parties will conduct in-depth collaboration on the application of in-memory computing chips in the simulation field, and jointly create a complete physical AI ecosystem from underlying computing power to application training .

Currently, the next generation of AI is moving from the digital world to the physical world, with physical AI becoming a core direction of industrial transformation. Training physical AI requires a large amount of high-quality physical simulation data, while the efficiency bottleneck of simulation computing calls for revolutionary innovations at the underlying computing power level.

Micro-nano core independently developed 3D -CIM™ LPU chip By breaking through the traditional von Neumann architecture with an innovative architecture , it achieves a leapfrog improvement in computing power and energy efficiency. As a leading simulation software company in China, Cloudwise's multiphysics simulation platform, Simdroid , is widely used in key areas such as electronic heat dissipation and chip multiphysics. In 2025 , Simdroid's electronic heat dissipation module license sales revenue ranked first in the Chinese electronic heat dissipation market.

In this strategic cooperation, both parties will fully leverage their respective strengths: In terms of architectural innovation, MicroNano Core's pioneering 3D-CIM™ LPU chip in-memory computing architecture provides high-performance, high-energy-efficiency underlying support for simulation calculations; regarding deep compatibility, both parties will jointly promote the integration of MicroNano Core chips with…Sim-PI, a physics AI development platform Deep hardware and software adaptation; in terms of ecosystem co-construction, we will work together to explore more possibilities of GPU- accelerated simulation and create a complete physical AI ecosystem from ontology to training to deployment .

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Oriental Crystal Source's HV-SEM successfully installed on advanced process production lines​


Following the successful deployment of its first self-developed HV-SEM high-energy electron beam equipment at a leading domestic wafer foundry, Orient Microelectronics Technology (Beijing) Co., Ltd. (hereinafter referred to as "Orient Microelectronics" or "the Company") has recently completed another successful deployment of its HV-SEM, which has been smoothly installed on advanced domestic process production lines. This successful application marks a significant acceleration in the industrialization of the Company's high-energy electron beam metrology equipment, rapidly filling the technological gap in the field of high-end metrology equipment for advanced domestic processes, and empowering the iterative upgrading of my country's integrated circuit advanced processes with its core self-developed technology.

As a high-end electron beam metrology equipment designed for advanced processes, HV-SEM represents the culmination of technologies, with extremely high technical barriers and immense development challenges. This equipment must possess the high-precision measurement core capabilities of CD-SEM, enabling accurate measurements under high-energy electron beam conditions, as well as BSE/SE multi-channel imaging technology similar to DR-SEM. Furthermore, it must integrate the EBI big data computing system to achieve diversified intelligent algorithm analysis of massive amounts of data.

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Building upon this foundation, Orient Crystal has independently overcome the challenges of high-energy electron beam control and calibration systems, and exclusively developed dedicated algorithms and application solutions for SEM overlay measurement adapted to advanced processes. In response to the continuous miniaturization of line width dimensions in advanced processes, the company has further iterated and optimized core modules such as nanometer-level motion control of the workpiece stage, comprehensively improving equipment accuracy, stability, and adaptability to precisely match the stringent process standards of advanced manufacturing processes.

In fields such as 3D-NAND, DRAM, advanced logic, and advanced packaging, HV-SEM, with its unique deep imaging advantages of high-energy electron beams, plays an irreplaceable key role in applications such as in-die SEM overlay, ultra-high aspect ratio (HAR) 3D structure measurement, and deep defect detection. It is an indispensable core equipment for advanced integrated circuit process R&D and mass production and has important strategic value.

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CoreLink Integrated has launched its fourth phase project, increasing its investment in AI server power supplies and optical interconnects.​

Chiplink Integrated Circuits announced plans to jointly build a 12-inch mixed-signal chip production line with a monthly capacity of 50,000 wafers in Shaoxing, Zhejiang Province. This project, the company's fourth phase of investment, has a planned total investment of approximately 20 billion yuan, with Chiplink Integrated Circuits contributing 3.012 billion yuan, holding a 25.1% stake. This move is seen as a key strategic move by Chiplink Integrated Circuits to systematically enter the high-growth sectors of AI server power management chips and optical interconnect chips, while consolidating its advantages in new energy vehicle and industrial control chip manufacturing. Against the backdrop of explosive growth in global AI computing power demand and the accelerating trend of self-reliance in China's semiconductor industry, this significant investment aims to enhance China's manufacturing capabilities in high-end analog, power, and silicon photonics chips.

The five major platforms cover automotive-grade, AI power supplies, silicon photonics, and germanium-silicon technologies.
The fourth phase of the project will primarily focus on the research and development and manufacturing of five core process platforms, covering key technologies from mature processes to advanced nodes:

1. 55nm to 28nm automotive-grade MCU and AI edge DSP chip platform : targeting the fields of smart cars, industrial automation and AIoT (Artificial Intelligence of Things), among which the deployment of AI edge DSP is aimed at providing localized computing power support for edge computing devices.

2. 90nm Mixed-Signal Chip Platform: Focusing on high-performance, high-power, and high-reliability BCD (Bipolar-CMOS-DMOS) technology, primarily serving the new energy vehicle, industrial control, and high-end consumer electronics markets.

3. 55nm AI Server High-Frequency Power Management Chip Manufacturing Platform : Directly addressing the power system needs of AI servers, providing high-power-density and high-efficiency power supply solutions for high-performance computing chips such as CPUs/GPUs, in order to meet the urgent demand of global data centers for advanced power chips.

4. 55nm Silicon Photonics Chip Platform : Targeting the data center optical interconnect, high-speed communication within AI clusters, and high-speed optical module markets. This platform will further build and expand the production capacity of 55nm silicon photonics chips, building upon the existing 8-inch silicon photonics production line (Phase I) and the 12-inch 90nm silicon photonics technology (Phase III).

5. 55nm SiGe (Silicon Germanium) Transimpedance Amplifier and Laser Driver Chip Platform for Optical Engines : Core electrical chips covering both the receiver and transmitter ends of high-speed optical modules. This platform will work in conjunction with the 55nm silicon photonics platform to form a complete solution of "silicon photonics chip + supporting electrical chips," providing customers with one-stop optical engine foundry services.

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tphuang

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tokenanalyst said:

CoreLink Integrated has launched its fourth phase project, increasing its investment in AI server power supplies and optical interconnects.​

Chiplink Integrated Circuits announced plans to jointly build a 12-inch mixed-signal chip production line with a monthly capacity of 50,000 wafers in Shaoxing, Zhejiang Province. This project, the company's fourth phase of investment, has a planned total investment of approximately 20 billion yuan, with Chiplink Integrated Circuits contributing 3.012 billion yuan, holding a 25.1% stake. This move is seen as a key strategic move by Chiplink Integrated Circuits to systematically enter the high-growth sectors of AI server power management chips and optical interconnect chips, while consolidating its advantages in new energy vehicle and industrial control chip manufacturing. Against the backdrop of explosive growth in global AI computing power demand and the accelerating trend of self-reliance in China's semiconductor industry, this significant investment aims to enhance China's manufacturing capabilities in high-end analog, power, and silicon photonics chips.

The five major platforms cover automotive-grade, AI power supplies, silicon photonics, and germanium-silicon technologies.
The fourth phase of the project will primarily focus on the research and development and manufacturing of five core process platforms, covering key technologies from mature processes to advanced nodes:

1. 55nm to 28nm automotive-grade MCU and AI edge DSP chip platform : targeting the fields of smart cars, industrial automation and AIoT (Artificial Intelligence of Things), among which the deployment of AI edge DSP is aimed at providing localized computing power support for edge computing devices.

2. 90nm Mixed-Signal Chip Platform: Focusing on high-performance, high-power, and high-reliability BCD (Bipolar-CMOS-DMOS) technology, primarily serving the new energy vehicle, industrial control, and high-end consumer electronics markets.

3. 55nm AI Server High-Frequency Power Management Chip Manufacturing Platform : Directly addressing the power system needs of AI servers, providing high-power-density and high-efficiency power supply solutions for high-performance computing chips such as CPUs/GPUs, in order to meet the urgent demand of global data centers for advanced power chips.

4. 55nm Silicon Photonics Chip Platform : Targeting the data center optical interconnect, high-speed communication within AI clusters, and high-speed optical module markets. This platform will further build and expand the production capacity of 55nm silicon photonics chips, building upon the existing 8-inch silicon photonics production line (Phase I) and the 12-inch 90nm silicon photonics technology (Phase III).

5. 55nm SiGe (Silicon Germanium) Transimpedance Amplifier and Laser Driver Chip Platform for Optical Engines : Core electrical chips covering both the receiver and transmitter ends of high-speed optical modules. This platform will work in conjunction with the 55nm silicon photonics platform to form a complete solution of "silicon photonics chip + supporting electrical chips," providing customers with one-stop optical engine foundry services.

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wow, United Nova is becoming quite the power house.

400k wpm 8-inch equivalent. 55nm SiPo platform is quite impressive. Looks like they are fully benefitting from the AI play.

And they got Zhejiang govt to put all the money in on this phase 4 project for 50k wpm 12-inch equivalent.

btw, does anyone know how competitive is this 55nm SiGe laser drive chip for optical engines?
 
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GigaDevice Unveils New High-Performance MCUs for Optical Communication Market Expansion​


On June 11, 2026, GigaDevice, a leading semiconductor manufacturer based in China with global reach, announced the launch of its new GD32E512 and GD32E252 microcontroller unit (MCU) series. These dedicated products are specifically engineered to support the rapidly evolving optical communication industry, addressing critical needs across both high-speed data centers and cost-sensitive access networks.

GigaDevice has maintained a strong focus on the optical interconnect market for nearly a decade. By 2018, the company made pivotal R&D investments that led to its first dedicated optical MCU, achieving million-unit shipments within the same year. This momentum culminated in 2022 when optical module-specific MCUs reached ten-million units shipped, securing GigaDevice's position as a top-tier global supplier.

Now, driven by the surging demand for AI computing power and high-speed interconnection technologies (including pluggable optics, silicon photonics, and Co-Packaged Optics), GigaDevice aims to further solidify its leadership with these new applications-optimized chips.

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The new portfolio addresses diverse application scenarios through two distinct series:
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1. GD32E512 Series: For High-Speed Applications​

Designed for demanding high-speed optical modules found in telecom and data centers, this series features:​
  • Core Performance: Powered by the Arm Cortex®-M33 core, operating up to 120 MHz.​
  • Communication Upgrade: Integrated support for I³C, enabling higher bandwidth, lower latency, and denser communication essential for next-gen modules.​
  • Compact Design: Available in an ultra-3 × 3 mm package to optimize PCB space for miniaturized module designs.​
  • Rich Peripherals: Includes a comprehensive suite of analog and digital interfaces: 3× I²C, 1× MDIO, 2× ADCs, 4× DACs, and multiple comparators/op-amps for robust system monitoring and control.​

2. GD32E252 Series: For Low-Speed & Cost-Sensitive Applications​

Optimized for access networks and industrial optical communications where efficiency is key, this series features:​
  • Core Performance: Built on the Arm Cortex®-M23 core.​
  • Analog Excellence: Delivers enhanced analog performance compared to standard MCUs while maintaining high integration.​
  • Efficiency & Reliability: Focuses on low power consumption and wide-temperature operation, with strong EMC (Electromagnetic Compatibility) performance.​
  • Development Speed: Offers compact packages and simplified system design to accelerate time-to-market for customers in cost-sensitive markets.​
With a broad ecosystem spanning Flash memory, sensors, and analog devices, GigaDevice promises fully self-developed, mass-production-ready solutions. As the industry transitions toward AI-driven infrastructure and high-speed networking, GigaDevice remains committed to expanding its MCU portfolio to enable the future of optical connectivity globally.

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