Chinese semiconductor thread II

tphuang

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more on the YMTC story, I guess TechInsight guy got interviewed by Bloomberg

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Still, significant technical challenges remain for YMTC and its partners, which include
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, Wei said. The new chip made with YMTC’s Xtacking 4.0 technology actually has 70 fewer layers than the 232-layer chip made with its earlier-generation tech. This was because the latest fabrication method had a lower production yield — the ratio of functional chips to faulty ones from a wafer of silicon — due to the use of Chinese tools and YMTC was forced to downgrade the specification, TechInsights said.
Now, this makes a lot more sense to me than still using US tools for critical part

For the etching and vapor deposition parts of the process for the critical layers, TechInsights believes that YMTC is still reliant on US and Japanese tools acquired before the sanctions
I think this is off. They are still using Japanese tools for critical layers. But there is no way they can expand production if certain steps still relies on US tools. It's most likely the limitations of 160-layers is entirely due to limitation of AMEC tools
 

gelgoog

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Yeah this is just bollocks. The US supposedly sanctioned sales of tools able to do over 128 layer NAND. So how come YMTC is making this 160 layer NAND. They clearly are using other tools for etch and deposition. Likely Chinese ones.

If this was some sort of production with pre-existing US tools, why bother making this 160 layer NAND, when they already had a 232 layer NAND process?
 

BlackWindMnt

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Yeah this is just bollocks. The US supposedly sanctioned sales of tools able to do over 128 layer NAND. So how come YMTC is making this 160 layer NAND. They clearly are using other tools for etch and deposition. Likely Chinese ones.

If this was some sort of production with pre-existing US tools, why bother making this 160 layer NAND, when they already had a 232 layer NAND process?
Maybe they can scale up capacity better with their existing US supplemented with domestic tools at 160 layers than creating 232 layers? Im just assuming that 160 layers is quicker process than 232 layers.
 

tokenanalyst

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Total investment of 300 million yuan! Weima Core Materials' annual production of 100 tons of semiconductor high-end lithography materials project capped​


Recently, with the completion of the last cubic meter of concrete pouring, the main structure of the 100-ton annual production of semiconductor high-end photolithography materials project of Weima Core Materials (Hefei) Semiconductor Co., Ltd. located in Xinzhan High-tech Zone has been fully capped.

MBXY-CR-b69b1a6c195f7b660bae01821361da95.png


The project is located at the intersection of Yingzhou Road and Longzihu Road, covering a total area of 50 mu, with a total investment of 300 million yuan. Construction started in March this year, aiming to build the largest mass production base of high-end semiconductor DUV-level (ArF/KrF) photoresist core materials in China. Products include photoacid generator PAG, BARC layer resin Resin, photoinitiator PI, etc., and also provide intermediates and core monomer materials for each final product. The planned annual production capacity is 100 tons, which will be completed and put into use by the end of the year.

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interestedseal

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This award from 2023 got posted on Zhihu. Mention of 1.4m long NA1.35 projection lens with subnanometer wavefront aberration rms and distortion. NA and wavefront aberration (part of k1) control the resolution, and distortion controls overlay.

As a comparison, this is the metric for a 45nm 1.35NA catadioptric projection lens from Zeiss:
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broadsword

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This award from 2023 got posted on Zhihu. Mention of 1.4m long NA1.35 projection lens with subnanometer wavefront aberration rms and distortion. NA and wavefront aberration (part of k1) control the resolution, and distortion controls overlay.

As a comparison, this is the metric for a 45nm 1.35NA catadioptric projection lens from Zeiss:
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Used for DUV only?
 
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