Chinese semiconductor thread II

[pbd456]

if

No. It isn't. They are two different things. One refers to the light source and other refers to the optics. You seem to have blind faith in synchrotron light sources.

if SSMB can produce light source that are narrower than 13nm, then one wouldnt need better optics to get a better system.

 

[Hyper]

Seems like new materials like graphene or whatever are a perfect opportunity to reset the board, as it were, for semiconductor technology. Just like ICE->NEV, the switch over to a new solution for the same problem opens opportunities for historical laggards to catch up or even outpace historical leaders. Of course, it's much easier to say in hindsight.

Well not graphene but other TMDs. You are right. Lithography scaling has limits. Huge limits.

 

[Hyper]

if

if SSMB can produce light source that are narrower than 13nm, then one wouldnt need better optics to get a better system.

No. That will need new resist and photo mask. And light at even lower wavelength is too energetic. Too many errors. I think IBM demonstrated that x-ray lithography cannot work. Time to go 3D starting with Nanosheets proceeding to 3D-IC.

 

[european_guy]

“Moving forward long term, we need to improve our illumination system, and we have to go to Hyper-NA,”

"if all you have is a hammer, everything looks like a nail"

I am not qualified to comment on the merit, it just seems to me that they just keep insisting moving along the same old path. I don't know if there will be a game changer in lithography or, more generally, in wafer patterning....but hardly it will come from ASML. They are the legacy. They have the full R&D and company focused on a single path forward, no matter the costs, no matter the productivity (High NA EUV

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, requiring double speed for same area coverage), no matter the complexity, off the charts already and getting worse.

It is telling that

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EUV chipmaking tools until 2030 or later.

Today this path forward seems a dead end....Europeans love complexity in technology and in general too, Americans are much more straightforward and effective...we will see what we'll actually have in 2030 and beyond....

 

[CMP]

Any update on the most recent Samsung, TSMC, and Intel fabs in the US?

 

[ansy1968]

Any update on the most recent Samsung, TSMC, and Intel fabs in the US?

TSMC will be producing 5nm chips by the year 2026

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Jan 19, 2024 — TSMC unveiled plans last January for production at the plant to begin in 2026. ... 5-nm chips produced at the first fab planned for Arizona.


While Intel delayed it until 2027

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Mar 18, 2024 — Intel reports that its Ohio fab won't be operational until 3 years later than originally reported.

Samsung on the other hand is more optimistic that their Taylor FAB will be operational by the year 2025.

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Dec 26, 2023 — Samsung Electronics Co. Ltd. has reportedly put off mass production at its new chipmaking fab in Taylor, Texas, by up to six months.

 

[ansy1968]

So if our projection of China EUVL appearing in 2025 is correct and SMIC N+3 5nm chip being mass produced on the same year, then China will be a year ahead vis a vis the American both in 5nm and 3nm chip (2026) until 2027 when TSMC finished its second Arizona FAB and start producing its 3nm chip.

 

[Hyper]

"if all you have is a hammer, everything looks like a nail"

I am not qualified to comment on the merit, it just seems to me that they just keep insisting moving along the same old path. I don't know if there will be a game changer in lithography or, more generally, in wafer patterning....but hardly it will come from ASML. They are the legacy. They have the full R&D and company focused on a single path forward, no matter the costs, no matter the productivity (High NA EUV

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, requiring double speed for same area coverage), no matter the complexity, off the charts already and getting worse.

It is telling that

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EUV chipmaking tools until 2030 or later.

Today this path forward seems a dead end....Europeans love complexity in technology and in general too, Americans are much more straightforward and effective...we will see what we'll actually have in 2030 and beyond....

Optics and chemistry are very unfavorable going forward and probably won't get better enough that the solution doesn't bring it's own problems. Move away from shrink scaling and scale upwards.

 

[tphuang]

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Hisilicon unveils W610 open source Kirin platform for wearables. SoC comes with dual core CPU + GPU + DSP with 26Mb+128Mb storage
Supports also Hisilicon's GNSS module which supports five different GNSS + CAT1 + Wifi + NFC
also added AI processing
first to support OpenHarmony wearable developer platform

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expect more Kirin chips to be coming. 2 new 5G phones + a new pad to get it. I guess this will be Nova 13 and maybe another foldable phone

 

[tokenanalyst]

Simulation of flow and debris migration in extreme ultraviolet source vessel​

Practical extreme ultraviolet (EUV) sources yield the desired 13.5 nm radiation but also generate debris, significantly limiting the lifespan of the collector mirror in lithography. In this study, we explore the role of buffer gas in transporting debris particles within an EUV source vessel using direct numerical simulations. Our study involves a 2 × 1 × 1m3 rectangular cavity with an injecting jet flow subjected to sideward outlet. Debris particles are introduced into the cavity with specified initial velocities, simulating a spherical radiating pattern with particle diameters ranging from 0.1 to 1 μm. Varying the inflow velocity (from 1 to 50 m/s) of the buffer gas reveals a morphological transition in the flow field. At low inflow velocities, the flow remains steady, whereas higher inflow velocities induce the formation of clustered corner rolls. Upon reaching sufficiently high inflow velocities, the jet flow can penetrate the entire cavity, impacting the end wall. Interestingly, the resulting recirculation flow leads to the spontaneous formation of spiraling outflow. The distinct flow structures at various inflow velocities lead to distinct patterns of particle transport. For low-speed gas, it is efficient in expelling all particles smaller than 0.4 μm, while for high-speed gas, those fine particles accumulate near the end wall and are challenging to be extracted. Our findings highlight the significance of controlling flow conditions for effective debris particle transport and clearance in diverse applications especially in EUV source vessels.

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