I've read here that the understanding is that SMIC 7nm capacity is pretty healthy and will be over 30k by the end of the year.
However, that does not mean all the capacity goes to one consumer. Nor is all of it production ready yet.
Chinese semiconductor thread II
- Thread starter vincent
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However, that does not mean all the capacity goes to one consumer. Nor is all of it production ready yet.
Nah you are understanding Apple and tsmc's relationship. Most likely Apple told them to make it. Has happened a lot of times. Nvidia and Apple are two companies with same power as tsmc in the semiconductor industry. It is doubtful tsmc would go ahead with dud node. They would have cancelled it midway. Apple most likely forced them to make it.
We know for a fact that TSMC mass-produced "5nm" class densities with only 5 layers of EUV on their earliest 5N nodes. They also produced 120MTr/mm2 densities with DUV SAQP. These densities are based on the few SOCs released with these DUV nodes.
Looking at the 9000s, we get 112MTr/mm2, using 63nm gate, 44nm fin pitch, and 42nm minimum metal pitch. Compare this to the best DUV processes from TSMC, Intel, and Samsung, and you get a picture of the (so-far) proven limits of DUV SAQP. Those are 60nm gate, 27nm fin pitch, and 40nm metal pitch. I'd argue you could get down to around 50nm gate using DUV SAQP, which should be competitive with TSMC N5.
The best DUV 2000i and 2050i scanners can arguably achieve better than this result with much lower yields, arguably exponentially lower since they would be using the absolute smallest feature size 193nm lithography can achieve, but 4 times in a row, with SAQP. That would probably get you to 40nm gate pitch, at the cost of an order of magnitude lower yields than the 9000s.
5nm class node is doable with DUV. 3nm is theoretically possible, but at an order of magnitude lower than the theoretical 5nm.
In conclusion, SMIC can achieve 5nm lithography with DUV SAQP.
lcloo
Captain
If you can comprehend Chinese language, you should know under what condition 得到 or 得不到 is used.
Do you know any customer other than Huawei uses SMIC 7nm process？The only confirmed case was a crypto mining chip before Huawei
Huawei cannot get 7nm from TSMC either，so why would he say " “我们肯定是得不到 3nm，肯定得不到 5nm，我们能解决 7nm 就非常非常好。”？
If Huawei can get/make 5nm chips，shouldn't he say “我们肯定是得不到 2nm，肯定得不到 3nm，我们能解决 5nm 就非常非常好。”？
Because 3nm and 5nm are the relevant processes in production today which Huawei has yet to be able to access from domestic sources in a manner which they already have on the shelf, at the time that he was speaking.
They can access 7nm domestically at the time he was speaking.
What is important to Huawei from their perspective isn't whether they can source anything from TSMC or not, but rather what they're able to source domestically and what processes they cannot yet source domestically.
Because Huawei are not going to publicly reveal that they can source 5nm until they've got a product in mass production and on the shelf.
Yes. China has been developing EUV, 1nm is a marketing term
1nm is marketing. As a matter of fact most gains are from DTCO, not from shrink. N2 is basically N3 with horizontal nanosheet. N1.8 is basically N2 with Backside power delivery. Hardly any shrink and little sram scaling.