Hunan University has developed a sub-ppm-level high-precision voltage reference chip to support precision measurement applications such as industrial sensing.
High-precision voltage references are core components of precision measurement systems such as industrial sensors and smart meters. These systems typically require voltage references to have an ultra-low temperature coefficient of less than 1 ppm/℃ within an industrial temperature range (−40℃ to 85℃). However, traditional bandgap references are limited by the inherent nonlinear curvature of the base-emitter voltage of bipolar transistors, making it difficult for their temperature drift performance to break through the 1 ppm/℃ bottleneck.
To address the aforementioned challenges, Professor Chen Zhuojun's team at the School of Semiconductors, Hunan University, innovatively proposed a hybrid compensation technology combining electrical and thermal methods. Based on a 65nm CMOS process, they successfully designed and fabricated a high-precision voltage reference chip. In the high-temperature region (10℃ to 85℃), a second-order curvature correction technique was employed to offset the higher-order nonlinear terms of the bipolar transistor. In the low-temperature region (−40℃ to 10℃), a segmented chip self-heating technology and a temperature-locked loop were constructed. Through the closed-loop negative feedback of the temperature-locked loop, the chip temperature was locked at 10℃, reducing the maximum heating power consumption by 49.7% compared to full-segment self-heating technology. Chip testing results show that the chip has an average temperature coefficient of only 0.5 ppm/℃ within the industrial-grade temperature range of −40℃ to 85℃. The chip core area is only 0.12 mm² . Compared with contemporary advanced work, this chip achieves optimal performance in terms of temperature drift performance and area efficiency.

The related research findings, titled "A 0.5-ppm/°C Voltage Reference With Sub-Ranging On-Chip Self-Heating and Second-Order Compensation in 65-nm CMOS," were published in the prestigious international journal in the field of integrated circuits, * IEEE Journal of Solid-State Circuits *. The first author of the paper is Dr. Wenzhao Lü from Hunan University, and the corresponding authors are Professors Zhuojun Chen and Lei Liao.



