For more than half a century, the semiconductor industry has been advancing by leaps and bounds in accordance with "Moore's Law", but as the advanced process technology of integrated circuits continues to shrink, it is getting closer and closer to the physical limit and facing technical bottlenecks; on the other hand, emerging industries such as artificial intelligence, 5G, and autonomous driving are booming, and the requirements for computing chip performance are gradually increasing, bringing multiple challenges.
Huatian Technology Creates eSinC 2.5D Platform
Public information shows that while expanding and improving the scale and level of its existing integrated circuit packaging business, Huatian Technology has vigorously developed advanced packaging technologies and products such as SiP, FC, TSV, Fan-Out, WLP, 2.5D, 3D, Chiplet, and FOPLP. In particular, for the 2.5D advanced packaging track, Huatian Technology is committed to building the eSinC (Embedded System in Chip) 2.5D packaging technology platform to meet the high-end packaging and testing needs of the artificial intelligence (AI) era.
Public information shows that Huatian Technology's eSinC 2.5D packaging technology platform includes three major 2.5D technology categories, namely, silicon interposer chiplet system SiCS (Silicon interposer Chiplet System), fan-out chiplet system FoCS (Fan out Chiplet System) and bridge chiplet system BiCS (Bridge interconnection Chiplet System):
1. SiCS is a 2.5D advanced packaging technology that uses silicon adapters to achieve multi-chip interconnection. This structure usually has high-density I/O interconnection and is suitable for the needs of high-performance computing and large-scale integrated circuits. The advantage of SiCS lies in its precise manufacturing process and superior electrical performance.
2. FoCS uses a rewiring layer (RDL) as an interposer to achieve interconnection between chips, mainly used to reduce costs and adapt to the connection requirements of different types of devices. It has greater design flexibility and can support more chip connections. The key features of FoCS technology include: using an RDL interposer, which is composed of polymers and copper wires and has relatively high mechanical flexibility.
3. BiCS key features include: using LSI chips to achieve high-density chip-to-chip interconnects. These chips can have a variety of connection architectures and can be reused for multiple products. The mold-based interposer has a wider RDL layer spacing and uses through-holes that penetrate the interposer to achieve low-loss and high-speed transmission of signals and power, and can integrate additional components.
