Chinese semiconductor thread II

[tokenanalyst]

Huahong Grace has optimized the matching of scanners of different vendors (NIkon and ASML) using overlay,AEI and ADI inspection tools. They develop a model that allows to calibrate both immersion tools. If lithography manufacturers in China provide tools for matching domestic scanners these can operate alongside foreign scanners decreasing the barrier of adoption for domestic lithography scanners.

China doesn't have to wait for pure domestic fabs for these domestic scanners to increase their market share in the domestic market.

 

[Michael90]

China’s leading memory chipmaker Yangtze Memory Technologies is taking a major step toward a domestic stock market debut. According to filings published by China’s securities regulator, Yangtze Memory Technologies Holding Co. has completed IPO tutoring registration with the Hubei branch of the China Securities Regulatory Commission, with CITIC Securities acting as its sponsor for a planned public listing. Reuters previously reported that the company could formally submit its application for Shanghai’s STAR Market as early as mid-June 2026.

Please, Log in or Register to view URLs content!

Interesting. I thought they will prioritize Hong Kong for obvious reasons, since it has a much more open , matured and liquid financial market. It’s interesting to see they choosed Shanghai .

 

[snake070]

I was initially assuming that HW's HBM will somewhat relied on CXMT production, despite having proprietary design. And if CXMT is delayed for HBM3 production then Huawei's Ascend plans would be in trouble. The media report seemed fairly credible, the main argument was CXMT has not placed any mass production orders.

Huawei's HBM-like products are not called HBM, because Huawei is not a JEDEC member. Moreover, the so-called mass production of HBM3 by CXMT is based on Korean media reports. I think the Koreans have overestimated CXMT's R&D capabilities. CXMT's latest project is the Phase 2, Stage 2 wafer fab in Beijing, with a process technology of 17 to 15 nanometers, and it is just for ordinary DRAM, not HBM. Huawei has many shadow fabs; the HBM production could come from its own fab or from Fujian Jinhua (JHICC). Tongfu Microelectronics started trial production at the end of 2024 at its packaging and testing plant in Nantong, with an annual packaging capacity of 2 million HBM memory chips

 

[Weaasel]

Defects can be reduced by better metrology and process optimizations. The industry did that for the 7nm and 14nm nodes with multiple patterning with immersion. My guess is, what cannot be overcomed by the fab is the low throughput of a tool, is it to manufacturer to optimize the tools the meet the fab requirements.

I have been following the back and forth between yourself and Latentlazy and this is what I thought. Metrological equipment used concurrently during the scanning and overlaying processes are what minimize defects. Self aligned quadruple patterning using DUV or DUVi is slower and requires more material that a single or fewer passes with any EUV machine to eventually get the same fine circuit lines (to use my layman analogy term). That time and material is energy so all other factors of input being equal, the cost is greater, and while there is always increased probability theoretically for more steps to result in more errors, if the metrological tools that are used to guide high rates of multipatterning processes are good enough, there actually shouldn't be any increase in the number of defects. No?

 

[huemens]

Huawei's HBM-like products are not called HBM, because Huawei is not a JEDEC member.

Huawei is a JEDEC member. They don't have to design it to conform to a specific industry spec or call it by a specific name because it's custom made for their own use and optimized for their own products.

 

[latenlazy]

Interesting. I thought they will prioritize Hong Kong for obvious reasons, since it has a much more open , matured and liquid financial market. It’s interesting to see they choosed Shanghai .

Global liquidity isn’t as valuable if it’s vulnerable to political disruptions.

I have been following the back and forth between yourself and Latentlazy and this is what I thought. Metrological equipment used concurrently during the scanning and overlaying processes are what minimize defects. Self aligned quadruple patterning using DUV or DUVi is slower and requires more material that a single or fewer passes with any EUV machine to eventually get the same fine circuit lines (to use my layman analogy term). That time and material is energy so all other factors of input being equal, the cost is greater, and while there is always increased probability theoretically for more steps to result in more errors, if the metrological tools that are used to guide high rates of multipatterning processes are good enough, there actually shouldn't be any increase in the number of defects. No?

For multipatterning you are not only doing additional scanning but additional etching and deposition with each additional scanning step, so accumulated defects aren’t just a matter of precision with successive scanning steps. If your metrology and process control are good enough you can often eventually suppress single step errors to the point where the stacked errors are so low they don’t really impact yields but it will always be the case that more steps mean more accumulated likelihood of errors all else held equal.

 

[PopularScience]

The day has finally come! Jensen Huang himself admitted that Huawei has successfully replaced NVIDIA: Goodbye CUDA.

Please, Log in or Register to view URLs content!

 

[tphuang]

The day has finally come! Jensen Huang himself admitted that Huawei has successfully replaced NVIDIA: Goodbye CUDA.

Please, Log in or Register to view URLs content!

keep in mind that this actually hasn't happened yet.

Chinese big tech are still using a lot of Nvidia chips through the offshore data centers, mostly in Southeast Asian countries. Nvidia and SMCI know this and turn a blind eye to it.

 

[tphuang]

CETC 48th institute has successfully developed high power diamond MPCVD platform prototype at its Hunan innovation center. It is now been validated.

Please, Log in or Register to view URLs content!

 

[tphuang]

Please, Log in or Register to view URLs content!

Lenovo recently unveiled Yoga Air 14 Ultra which uses new heat dissipation solution using DiaCu heatsink (Diamond-Copper), containing 3.4 Carat diamond, 600 W/m thermal conductivity & 10 g weight reduction. Allowing the computer to be thinner and lighter and maintaining 40W stable performance.