Don't count on it. You are comparing a quad core with an octa core.
Chinese semiconductor industry
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I believe the U are the weaker mobile chips. If going by geekbench , the i3-10100 is just 10% worst than the Ryzen. Supposedly the Loongson is competitive to the i3-10100 but that is based on their old/outdated benchmark tools. I've seen some comments that the integrated graphics chip is weak but good enough for video streaming. However people recommend getting a supported radeon graphics card which runs around 80$ extra.
The Intel i3-10100 is a quad core processor. The AMD Ryzen 7 4700U he mentioned is octa core.
As for the claim that SPEC CPU 2006 is "outdated". While there is a more recent SPEC CPU benchmark, SPEC CPU 2006 is still a reasonable benchmark suite to measure overall CPU performance.
My guess as to why Loongson used SPEC CPU 2006 as the benchmark is because they wanted to be able to compare performance with their previous generation CPU which already had published results.
Loongson presented multiple comparisons actually.
Spec2006, Spec2017, Stream and UnixBench
The only one where it lost to i3-10100 is single-core INT/FP for spec2006/2017. It's multi-core performance were significantly better due to the hyperthreading mode
the main thing is that Loongson limits itself to 2.5GHz. When you clock it to 3GHz through liquid cooling, it does even better.
Also Loongson CPU equipped machines are already on sale on JD.com. Should have more products by Asus and other OEMs in the future. Clearly, 3A6000 is the most capable domestic CPU atm. It's only problem is lack of ecosystem
This performance is decent enough for most desktop use cases. But they are still comparing with a CPU released in Q2'2020.
Also it's not like Intel has been the best choice since AMD's Zen came out.
This is decent performance. The main issue, I think, is lack of cores. Are they using chiplets like AMD or not? If they aren't it is going to be hard to make chips with large core counts cost effectively.
The Intel i3-10100 uses a CPU core design based on 'Skylake'. Intel is now using the 'Golden Cove' core design. Intel went from 4-wide to 6-wide. And they went from AVX-256 to AVX-512 SIMD instructions.
You can expect roughly 50% more scalar performance, and up to 2x the SIMD performance per clock.
Also it's not like Intel has been the best choice since AMD's Zen came out.
This is decent performance. The main issue, I think, is lack of cores. Are they using chiplets like AMD or not? If they aren't it is going to be hard to make chips with large core counts cost effectively.
The Intel i3-10100 uses a CPU core design based on 'Skylake'. Intel is now using the 'Golden Cove' core design. Intel went from 4-wide to 6-wide. And they went from AVX-256 to AVX-512 SIMD instructions.
You can expect roughly 50% more scalar performance, and up to 2x the SIMD performance per clock.
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The ryzen is a low (15) wattage mobile processor, its performance is being gimped. The I3 is a desktop processor running at full 95 watts.
Yes, but Russia literally has a team on it to create an ecosystem.
So, this should be interesting. They're claiming to already have an entire office suite and OS already ported and ready to go.
This news says that China already produce hybrid bonding DRAM. I wonder which company is it？
Hybrid bonding could be applied to DRAM, analyst say
DRAMs launching in the future may be made with hybrid bonding applied, a TechInsights analyst said on Thursday.
This is because it will allow chipmakers to increase the density of the DRAM to increase their capacity, analyst Jeongdong Choe said during a seminar hosted by SEMI in Suwon, south of Seoul.
LPDDR5X and other latest memory chips only had a cell array efficiency of 50% at the current stage, Choe said.
If like NAND, chipmakers can make the DRAM array die and make the peripheral separately, this could maximize density, he said.
Peripheral handles logic work in a DRAM. Current DRAM includes the logic circuits inside it. Choe is proposing that this be separated so that the space can be used to pack in more memory circuits.
NAND chips already have the peripheral underneath the memory cell to increase their densities.
Hybrid bonding refers to the bonding of a heterogeneous die and the wafer allowing improvements in I/O and circuit lengths.
Samsung, SK Hynix, and Intel are preparing to apply the process in their chip-making, according to analysts.
Choe said in China, products that have the CMOS logic and DRAM die hybrid bonded have already been produced and launched in the market.
Samsung and SK Hynix could make 32Gb DRAM using this same method, he said.
Meanwhile, the analyst also said that 3D DRAM is difficult to develop as unlike gate-all-around NAND __ a 3D NAND __ DRAM faces homogeneity issues if made in 3D
That is why memory chip makers will likely develop 4F square instead for the upgrade.
Samsung is developing 4F square memory chips while SK Hynix and Micron are focusing on 3D DRAM. 4F square is a cell array structure that is an upgrade from 6F square and can reduce the surface area of the die by 30%, according to analysts.
Hybrid bonding could be applied to DRAM, analyst say
DRAMs launching in the future may be made with hybrid bonding applied, a TechInsights analyst said on Thursday.
This is because it will allow chipmakers to increase the density of the DRAM to increase their capacity, analyst Jeongdong Choe said during a seminar hosted by SEMI in Suwon, south of Seoul.
LPDDR5X and other latest memory chips only had a cell array efficiency of 50% at the current stage, Choe said.
If like NAND, chipmakers can make the DRAM array die and make the peripheral separately, this could maximize density, he said.
Peripheral handles logic work in a DRAM. Current DRAM includes the logic circuits inside it. Choe is proposing that this be separated so that the space can be used to pack in more memory circuits.
NAND chips already have the peripheral underneath the memory cell to increase their densities.
Hybrid bonding refers to the bonding of a heterogeneous die and the wafer allowing improvements in I/O and circuit lengths.
Samsung, SK Hynix, and Intel are preparing to apply the process in their chip-making, according to analysts.
Choe said in China, products that have the CMOS logic and DRAM die hybrid bonded have already been produced and launched in the market.
Samsung and SK Hynix could make 32Gb DRAM using this same method, he said.
Meanwhile, the analyst also said that 3D DRAM is difficult to develop as unlike gate-all-around NAND __ a 3D NAND __ DRAM faces homogeneity issues if made in 3D
That is why memory chip makers will likely develop 4F square instead for the upgrade.
Samsung is developing 4F square memory chips while SK Hynix and Micron are focusing on 3D DRAM. 4F square is a cell array structure that is an upgrade from 6F square and can reduce the surface area of the die by 30%, according to analysts.
So one big upgrade from 3A5000 to 3A6000 is going from quad-core LA464 to quad-core LA664 (4 wide to 6 wide)
I'm not sure what's some of the other increases referring to in there like ROB number
You will notice on the left, it shows that for example, each generation improves by 2x or 2.5x from improved core design and then another 1.5x from new process.
Looks like we are getting about a 2x improve in 3A6000 from increased core.
Now according to the boss there, they can squeeze out another 20% improvement for next quad-core 3B6000. that's quite interesting.
Before finally moving to 7000 series, which will improve mostly via going from 12nm to 7nm process. But that's 2 years from now, so it really shows
1) Loongson maybe behind its own schedule
2) Huawei really has the 7nm process fully occupied at SMIC
If you look at this, plenty of area for improvement imo.
The die actually shrunk from 3A5000 to 3A6000. Power consumption still just a fraction of intel 14 and even less than intel 10
Can move up to DDR5 for internal storage
The L2 cache could really increase. 256KB is tiny. Intel 14 uses 20MB L2 cache!
All of which would increase power consumption & die size
But they have been very busy designing this their own core, ISA and chips as well as trying to find ecosystem partners.
They are spending more own R&D than all the money they are taking in.
Not getting enough support from Chinese govt in this. So, I will cut them some slack for needing improvement still
Yep, I read that too. Russians might end up saving Loongson, since Chinese market hasn't yet responded to all of Loongson's effort in creating its own ISA and core IPs. Crazy to me Chinese govt initially said no to the Russians.
there is example of hybrid bonding here
Chinese semiconductor industry
You might have better luck on their B2B site at alibaba.com. They have vendors there who sell YMTC Zhitai SSDs and ship them internationally.
www.sinodefenceforum.com
for 3D DRAM, I believe that's something that's been studied in China already. Huawei has their own patent on it
let's see how far they get with this.
I mean there is still plenty of improvement they can make now with just your standard DRAM process.
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