Chinese semiconductor industry

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hvpc

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@latenlazy and @Phead128 you are entitled to your opinion. I don’t think you understand the criticality of inspection and metrology is developing a new advanced technology node and ramping up to HVM with high yield.

your views clearly implies you have no experience in a R&D nor production setting fabricating advanced IC. Or am I wrong about your credentials? Not being disrespectful, just wondering how anyone with fab experience would come to your conclusion. Perhaps you can explain an anecdote on how you were able to do with little or subpar metrology/inspection to run a high end HVM fab.

what you are saying sounded like something a big boss would say. Tru to sell your views to those actually have to make all the tools work and achieve decent wafer yield. And see what they would say.

if you don’t really care about yield, then your view would be fine. But how long can you tolerate a fab running at low yield just because we are “at war” with the U.S.? It’s critics to recognize the importance and push domestic WFE to deliver. Saying, ‘shuck, it’s ok, not very important t’ sounds like a bunch of baloney and case of sour grapes if you’d ask me.
 
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latenlazy

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hvpc said:
@latenlazy and @Phead128 you are entitled to your opinion. I don’t think you understand the criticality of inspection and metrology is developing a new advanced technology node and ramping up to HVM with high yield.

your views clearly implies you have no experience in a R&D nor production setting fabricating advanced IC. Or am I wrong about your credentials? Not being disrespectful, just wondering how anyone with fab experience would come to your conclusion. Perhaps you can explain an anecdote on how you were able to do with little or subpar metrology/inspection to run a high end HVM fab.

what you are saying sounded like something a big boss would say. Tru to sell your views to those actually have to make all the tools work and achieve decent wafer yield. And see what they would say.
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I’m not saying you don’t need advanced metrology. I am saying a domestic tool doesn’t need to beat KLA to get you to self sufficiency.

I never claimed fab experience. I don’t work in semis and I have been very transparent about this over the years. I do work in a field that hires lots of semis engineers though. Specifically, I work in a company that makes what could be considered a biotech equivalent of metrology equipment (we do a lot of stuff with lasers and optics and signals processing).
 
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hvpc

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latenlazy said:
I’m not saying you don’t need advanced metrology. I am saying they don’t need to beat KLA to get you to self sufficiency.
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And I’m not saying we need to be better than KLA. They are at 3nm production capability already.
I’m saying we need capabilities to support 16nm, but using the same standard not a discounted standard. Some half ass tool maybe okay in the short term, but I would demand good performing tools that can address metrology/inspection need fitting for 16nm node…and then 7nm.

don’t even think about competing with KLA or other leading WFE. We need to compete against actual needs of lagging nodes first N-6 node (28nm) then N-4 node (16/14nm) and N-2 node (7nm). [yes, you read that right, what SMIC calls N+2 is what industry leaders would call N-2 node.]
 
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latenlazy

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hvpc said:
And I’m not saying we need to be better than KLA. They are at 3nm production capability already.
I’m saying we need capabilities to support 16nm, but using the same standard not a discounted standard. Some half ass tool maybe okay in the short term, but I would demand good performing tools that can address metrology/inspection need fitting for 16nm node…and then 7nm.
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hvpc said:
if you don’t really care about yield, then your view would be fine. But how long can you tolerate a fab running at low yield just because we are “at war” with the U.S.? It’s critics to recognize the importance and push domestic WFE to deliver. Saying, ‘shuck, it’s ok, not very important t’ sounds like a bunch of baloney and case of sour grapes if you’d ask me.
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“If you don’t care about yield that would be fine” is exactly the point. If you don’t have access to foreign equipment you’re not going to choose death just because yields are bad. It’s not even like starting with discounted standards needs to be a condition you have to tolerate forever. No one is saying that the industry shouldn’t push equipment providers to meet higher standards. I am certainly not. That does not mean that lower standards are unacceptable for adoption if the conditions warrant it. No one said that improvement should stop whenever adoption occurs, and in fact improvement is less likely to occur if you don’t get adoption at lower standards first to get a start on the learning curve.

Insofar as we are talking “war” I’m not sure you’re thinking in terms of what survival means here.
 
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tokenanalyst

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Is called
hvpc said:
I’m already aware of this, but thanks. Their focus is still mostly with mature nodes.

Let’s monitor its progress and readiness for ADVANCED nodes.
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In reality they say 28nm and below. I think in terms of wafer, mask and overlay metrology Chinese companies are way better positioned than in wafer lithography scanners for 28 and below process nodes, at least in the surface. What makes thing worst for KLA in China is that they are now competing with each other. Of course I could agree that is not just having the technology but also having the capacity of meeting the demand but they are getting there.

But also we can all agree that makes sense that this tool ecosystem for masks, wafers and overlay metrology is now in the process of being verified for advanced process by SMIC, YMTC, Huawei, the ICRD and the Shanghai equipment and material innovation center, in small production runs of 20000 WPM. I do know that YMTC are incorporating Angstrom-E metrology tools in their workflow, also for example
SMIC-Huawei are not going to wait until they run out of KLA, LAM and AMAT tools.

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tphuang

tphuang

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hvpc said:
@tphuag, With all due respect, I still think it's important I comment on @Weaasel's question. If you still think this is not good for this thread, feel free to remove this post.

I think everybody paid too much attention to litho tool as the bottleneck, and recently are giving lots of attention to the progress domestic WFE suppliers are making on etcher, deposition, wet process equipment, resists, and even EUV light source. I don't think people realize there are still many big gaps to fill in order to break the US restriction on advanced logic/DRAM/3D-NAND IC fabrication. Don't take my word at face value, I encourage you to investigate the list below to validate my concerns.

Potential bottleneck to reach self-sufficiency for Advanced Technology Nodes
Wafer:
Bright field wafer inspection
Dark field wafer inspection
ebeam inspection
diffraction based ADI Overlay metrology
AEI overlay metrology
CD SEM

Reticle:
advanced domestic merchant maskshops
reticle blanks
ebeam reticle writer
reticle etcher (Chrome & MoSi)
reticle blank inspection (should be relatively easy to overcome)
reticle inspection
reticle CD SEM
reticle registration metrology
reticle repair tool
AIMS
pellicles
curvilinear OPC for EUV reticles
multibeam reticle writer for EUV
EUV reticle blanks
EUV pellicle

Maybe it's just me, but I couldn't find much information on domestic WFE working on the above toolsets for <=16nm logic / <=18nm hp DRAM / >=128L 3D-NAND. Now that I've brought this to everyone' attention, perhaps you all could keep an eye out for relevant news or info. With more people looking it may be faster for us to verify where we sit relative to advanced node needs. Note, we still have access to advanced reticles from the Japanese maskshops, the reticle fabrication equipment I outlined would only come into play as bottleneck if the U.S. blocks sale of advanced reticles to China.
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Normally, I would, but this seems like a different topic than what we discussed before and spawning a lot of good discussions.

And if you want to talk about something that's broader. There is absolutely no reason to quote the old one or my warnings.

Edit: Alright, after going through that last page of your discussions with @latenlazy , I'm afraid it has descended into endless argument with no productivity, so I'm going to delete some of that

Always good to have discussions that yield technical details, but once it gets long, these discussions inevitable turn negative.
 
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sunnymaxi

sunnymaxi

Major
Registered Member
Alb said:
I think you have given this forum very useful information about the bottlenecks that China is having with advanced nodes. No one else has been so specific before.
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entire world knows this. China have bottleneck in advance nodes.

but the exact specific list in advance nodes ? nobody knows. its a top secret from Chinese semi companies. we even don't know much about progress and development in advance nodes tools. they just publish few patents and articles on Chinese websites. that's it

but the work/development is going on with full pace in advance nodes tools. this is what i know from my people.

Government has exempt taxes on semiconductor related R&D till 2027.

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and don't forget Chinese semiconductor equipment industry journey begun in 2018-19. before that, it was clown show all over. in just 4 years they have solved a lot problems and bottleneck in mature nodes. completed 28nm supply chain and many tools in 14nm too.

28nm indigenous supply chain was necessary. you have to build a ladder first. this is exactly what AMEC/NAURA/ACM/King Semi/Piotech/Huawei and others currently doing. laying the foundation for advance nodes. it will be painful and a long process but we don't have any choice.
 
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