Chinese semiconductor industry

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tonyget

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very interesting
so QLC - quad layer cells
TLC - tri layer cells

So QLC - 4 bits per cell
TLC - 3 bits per cell

To me that would imply similar # of levels with QLC would have high bit density than TLC.

YMTC just seems so much more capable than CXMT

product info
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read 7000MB/s
write 6000MB/s

(does anyone know what these are?)
4k read 900KIOPS
4Kwrite 700KIOPS

Cost SLC>MLC>TLC>QLC
R/W speed SLC>MLC>TLC>QLC
Lifespan SLC>MLC>TLC>QLC
 

TK3600

Major
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sure, but YMTC's advertised r/w speed & lifespan are all competitive or at least good enough compared to TLC product.

On the other hand, it's production cost should be lower
Sure but it will still compete with its own TLC products. QLC tend to be not much cheaper but noticeably less life span and speed. Maybe YMTC can surprise me.
 

tokenanalyst

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Guangli Micro's net profit in the first three quarters was 51.0367 million yuan, a year-on-year increase of 50.63%​


According to Jiwei.com news on October 25, Guangliwei released a performance report stating that in the first three quarters of 2023, the company achieved operating income of 256 million yuan, a year-on-year increase of 45.16%; net profit attributable to the parent company was 51.0367 million yuan, a year-on-year increase of 50.63%; deductions Non-net profit was 42.7803 million yuan, a year-on-year increase of 68.68%.
Among them, in the third quarter of 2023, Guangli Micro achieved operating income of 129 million yuan, a year-on-year increase of 30.39%; net profit attributable to the parent company was 28.1935 million yuan, a year-on-year decrease of 15.35%; non-net profit after deduction was 26.5424 million yuan, a year-on-year decrease of 18.34%.

Regarding the reasons for the company's continued growth in performance, Guangliwei pointed out in the institutional survey that the company Guangliwei always adheres to the development concept of technological innovation to continuously create value for customers, continuously deepens the depth of cooperation with existing customers, and continuously expands new customers. , in terms of EDA software, the client maintains a high repurchase rate and additional purchase rate, and continues to expand new customers; on the other hand, the company's WAT test equipment has been successfully verified at several typical customers, and the business promotion has been smooth It has entered the wafer factory mass production line on a large scale, and its equipment sales and market share are increasing year by year. The company has a clear positioning in business development and planning, and continues to increase investment in research and development. In terms of software, it focuses on improving the yield rate, using the advantages of software and hardware synergy to deepen the research and development and promotion of process monitoring solutions, and at the same time, it continues to develop new categories of software and hardware products. , has successively released the first manufacturability design tool - chemical mechanical polishing (CMP) modeling software, semiconductor defect automatic classification system, upgraded WAT test equipment (T4000 model), etc. These products can not only enrich and improve the company's integration Systematic solutions to improve circuit yield can also provide multiple engines for the company's business revenue growth in the future.

In terms of electrical testing equipment, Guangli Micro continues to improve testing technology and expand product categories. In the first half of 2023, we optimized and upgraded and launched a new generation of general-purpose high-performance semiconductor parameter testing equipment (T4000 model), which can cover the testing needs of all products such as LOGIC, CIS, DRAM, SRAM, FLASH, BCD, etc., and supports the third generation of compound semiconductors. (SiC/GaN) parameter testing, the test efficiency is effectively improved, and it is very cost-effective. It is suitable for use in cost-sensitive sub-8-inch and compound semiconductor production lines.
At the same time, we jointly developed functions such as the reliability test analysis system (Wafer Level Reliability, WLR) based on the T4000 electrical test equipment, extending the equipment from WAT testing to WLR and SPICE and other fields. In the T4000 series of test equipment, the company has developed a new generation of ultra-low leakage scalable matrix switches through cooperation with domestic partners. It has the excellent characteristics of high precision, fast speed, and flexible configuration, reducing the material cost of hardware equipment. Improve product performance and cost performance, further enhancing product competitiveness.

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hvpc

Junior Member
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sure, but YMTC's advertised r/w speed & lifespan are all competitive or at least good enough compared to TLC product.
They use more advanced node on CMOS side, so able to squeeze out better I/O compare to CMOSUnder-Array 3D-NAND of same configuration. All else being equal, the general comparison @tonyget provided would be correct. Downside of YMTC Xtackng is that it’s more expensive, more litho/process steps on a second wafer. Then there’s cost from having to bond the memory array side with the CMOS side.
On the other hand, it's production cost should be lower
No way YMTC cost is lower. The big 3 mostly use fully depreciated tools with simpler process flow. YMTC has higher number of litho steps using much better and more expensive scanner models that are not depreciated yet, use two wafer blanks, most likely lower yield from wafer bonding of two wafers (yield loss on one die on one wafer would kill yield of the bonded dies..so yield loss on the two wafers could be, worst case, sum of yield loss if the two wafers)

YMTC cost basis would be higher, not lower, for sure.
 

TK3600

Major
Registered Member
They use more advanced node on CMOS side, so able to squeeze out better I/O compare to CMOSUnder-Array 3D-NAND of same configuration. All else being equal, the general comparison @tonyget provided would be correct. Downside of YMTC Xtackng is that it’s more expensive, more litho/process steps on a second wafer. Then there’s cost from having to bond the memory array side with the CMOS side.

No way YMTC cost is lower. The big 3 mostly use fully depreciated tools with simpler process flow. YMTC has higher litho steps using much better and expensive scanner models that are not depreciated yet, use two wafer blanks. Their cost basis would be higher for sure.
Perhaps they use pricier tools but save on other things like personnel cost.
 
D

Deleted member 24525

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The word on the street is that Huahong already have had it for a year and that there was some type of handover recently. Now, whether or not it's actually ready for HVM, we don't know. havok certainly did not say when the delivery happened. And he is also not allowed to do so.
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You could find info on them via HuaHong or their annual report.

ICRD's website:
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Wait a minute
My understanding was that Huahong was a smaller, relatively less experienced fab than SMIC that focused more exclusively on legacy nodes. Yet the rumor is that they were the ones to get the prototype arfi machine, and not only that, but they are the owners of the ICRD, which until this point I thought was a prestigious state-owned lab for testing and developing semi manufacturing equipment? I do not understand.
 

gelgoog

Lieutenant General
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No way YMTC cost is lower. The big 3 mostly use fully depreciated tools with simpler process flow. YMTC has higher number of litho steps using much better and more expensive scanner models that are not depreciated yet, use two wafer blanks, most likely lower yield from wafer bonding of two wafers (yield loss on one die on one wafer would kill yield of the bonded dies..so yield loss on the two wafers could be, worst case, sum of yield loss if the two wafers)

YMTC cost basis would be higher, not lower, for sure.
Yes. YMTC likely have higher costs for now. But if the tools are that old, do they have the same operating speed? I know that older litho tools were slower than newer ones with more intense light source and more accurate mechanisms. And since this is about NAND, the speed will also depend a lot on etching rather than litho. As for YMTC using two wafers, most of the industry is expected to do that as well in the future as it is getting next to impossible to continue adding more NAND layers on top of each other.

I also think that a lot of people are assuming the logic layer wafer will take the same amount of tools and time as the actual NAND wafer. That twice the wafers will mean twice the price. I kind of doubt that. The logic wafer is probably a lot faster to process as it has way less layers.

Perhaps they use pricier tools but save on other things like personnel cost.
SK Hynix and Samsung also operate NAND fabs in China. So that is unlikely.

My understanding was that Huahong was a smaller, relatively less experienced fab than SMIC that focused more exclusively on legacy nodes. Yet the rumor is that they were the ones to get the prototype arfi machine, and not only that, but they are the owners of the ICRD, which until this point I thought was a prestigious state-owned lab for testing and developing semi manufacturing equipment? I do not understand.
If you are talking about the Hua Hong fab close to ICRD in Shanghai that is HLMC aka Shanghai Huali. The companies which make up Hua Hong have been around for longer than SMIC. Hua Hong was founded in 1996. They started out making DRAMs with Japanese NEC then went into the foundry business in 2003. Grace Semiconductor was founded as a foundry in 2000. Grace merged with Hua Hong in 2011. SMIC was founded in 2000.

HLMC manufactures chips at 28 nm in Shanghai. Their website also says they make chips at 22 nm. That requires ArFi machines.

For example this Zhaoxin CPU was supposedly made at HLMC with 28nm process:
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As for ICRD, from what I understand, it is owned by the Shanghai Municipal Government and it collaborates with the fabs in Shanghai.
Much like IMEC in Belgium the ICRD works with the industry to solve problems. If you go to their website they were helping fabs make image sensor chips for example. They help companies design processes as well.
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