Chinese semiconductor industry

Xingang Integrated Circuit Equipment Parts and Materials Industrial Park opened, and a number of major projects were completed.​

Jiang Min announced that the Xingang Integrated Circuit Equipment Parts and Materials Industrial Park has officially opened, and that major projects in Wuxi High-tech Zone will start intensively in the fourth quarter of 2023.

Xingang Integrated Circuit Equipment Parts and Materials Industrial Park is one of the key carrying parks in the "6+X" integrated circuit industry layout of Wuxi High-tech Zone, focusing on the development and manufacturing of integrated circuit equipment, integrated circuit core components and materials . The industrial park is located at the intersection of Changjiang South Road and Xuemei Road, with a total investment of approximately 980 million yuan, covering an area of approximately 150 acres, and a total construction area of approximately 184,000 square meters. It has 11 R&D and production buildings, 3 talent apartments, and parking Building 1.

Eighteen major projects, including the third phase of Wuxi International Life Science Innovation Park, started construction in the fourth quarter, with a total investment of more than 10 billion yuan, involving high-end optical chips, new energy automobile parts, scientific innovation carriers and other fields. Thirty-five major projects, including the Wuxi High-tech Zone Integrated Circuit Industrial Park project, were completed in the fourth quarter, with a total investment of more than 15 billion yuan, involving high-end equipment, new materials, special foods, scientific innovation carriers and other fields.

on the Maleeon GPU, it seems setup like this based on the video.
4 CUs (compute units), each has 2 sets of 128 ALUs and they all share 1 common 1 MB L2 cache 2x4x128=1024 ALUs (arithmetic logic unit)

A little different from the Mali G78 GPUs that Kirin-9000 used, which had up to 24 cores. Each core probably has individual ALUs, but I don't see the 4 CU and ALUs setup

I took a look at Nvidia desktop GPUs and they are also which much just equipped with thousands of cores that do the computation.

Then I took a look at Apple M2 GPU . It has 10 cores. Each core has 16 execution unit, which contains 8 ALUs each -> 1280 ALUs (generated 3.6 TFLOPS of computation).

MediaTek 9200+ uses ARM Immortalis-G715 which has 10-16 cores in premium version and 512kb to 2MB L2 cache
The architecture just doesn't seem very similar to what Maleeon uses

Now finally, we get to Adreno series, which is the most popular GPU for phone SoCs from what I can see
Adreno 730 has 1536 ALUs and operate at 818 or 900 MHz. No organization into CUs, also 1MB of Cache. Might be the one that's most similar to Maleeon, but I need to find more analysis of this

so I wonder if Maleeon GPU is structured this way due to Huawei's experience with Ascend series AI chips in dividing section into 4 CUs, each of which has 2 large 128 ALU blocks + shared resources (L1 cache)? Not saying good or bad but that's just how they set it up.

If they want to scale it up, they could just do 16 CUs -> 4096 ALUs for a laptop GPU to quadruple its performance. They could even do 32-64 CUs if they want to do like a dedicated graphics rendering GPU

They are definitely trying to avoid the problem of using someone else's IP and then losing access to it later.

Jingce Electronics: The cumulative contract value of semiconductor front-end quality testing equipment reaches 308 million yuan​

Jingce Electronics issued an announcement stating that from March 5, 2023 to October 8, 2023, the company’s holding subsidiary Shanghai Jingce and its subsidiaries within the scope of its consolidated statements have been operating for twelve consecutive months. We have signed multiple sales contracts with customers and sold multiple semiconductor front-end testing equipment to customers. The cumulative contract amount reached 307,740,905 yuan.
According to reports, the above-mentioned cumulative amount includes the total amount of major contracts previously announced by Jingce Electronics, totaling 289,271,055 yuan.
The signing of this batch of contracts is the daily business activities of Jingce Electronics, and does not constitute a related transaction, nor does it constitute a major asset restructuring stipulated in the "Administrative Measures for Major Asset Restructuring of Listed Companies".
Jingce Electronics believes that if this batch of contracts can be successfully performed, it is expected to have a positive impact on the company's operating results. The signing of this batch of contracts further deepens the cooperative relationship between the company and the customer on the basis of the original good cooperation, reflects the customer's high recognition of the company's semiconductor quality testing equipment, helps expand the company's brand influence, and enhances the company's market competitiveness.

Local chips and software would be beneficial through this procurement.

interestedseal said:

Skyverse isn’t the only company developing overlay metrology tools. Yuwei shipped out its Houyi overlay tool last year. Yuwei also develops mask inspection tools. Mask inspection is rarely talked about but is crucial because one defect on a mask gets copied onto every single wafer produced by it.

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I think the main news here is: Bright/dark field: 2Xnm bright/dark field detection equipment has been successfully developed;
This type of optical inspection equipment is together with lithography one of the weakest links in China. Jingce did develop something similar but only for 65nm. Fortunately Korea has a strong company, Nextin, that can substitute KLA till the Chinese equivalents reach world class level.

Looks like Loongson will be providing its CPUs to 百代 storage to provide fully domestic storage solutions

Again, hoping that LS does well. not as much news about them recently

gelgoog said:

It is highly unlikely that the EDA was domestic. But given the increasing amount of silicon design companies in China it is only natural that Chinese EDA will continue to improve. Chinese EDA already enjoys certain niches in chip design as it is with companies like Empyrean having good solutions for analog.

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I keep seeing that Huawei pirated US software in order to design the 9000S.

I assume that a chip like that is designed in a high-level language (verilog or similar) and then compiled with IP blocks ultimately to a mask for a particular process.

Is it actually posible to create such a massive project (the 9000S) on pirated software? I would expect the EDA software stack to have some sort of server-side part and / or another mechanism that prevented unlicensed use plus the final compilation to a mask to be proprietary to the particular process.

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