Chinese semiconductor industry

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hvpc

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Alb said:
JHICC have managed to de-americanize their DRAM 25nm production line. Do you know which extra tools are needed at 17nm compared to 25nm for DRAM. I am just trying to assess how hard it is to overcome the US restrictions for CXMT.
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There is not a straight forward answer to your question. the short answer is, we’ll need:
- a lot more metrology equipment
- more sophisticated fab SPC flow
- scanner with more CDU, Focus, and Overlay correction capabilities
- reliable and higher performance selective etch and deposition equipment than 25nm. since 17nm utilizes SAQP which requires better etch/deposition accuracy. Most complex patterning in 25nm is double exposure, which is more litho intensive

25nm is mainly litho intensive so the burden is on scanner, not process tools like etch and deposition. JHICC has the luxury of using scanner that’s intended for DRAM process that’s 3 to 4 generation more advanced. So even with sub par etcher and deposition, JHICC could get by.

CXMT unfortunately will not have such luxury. If the Dutch government go ahead and restricts advanced scanners, CXMT will be using the same model scanners to make 17nm that JHICC uses to make 25nm. CXMT’s requirement for etcher and deposition will be even more stringent than JHICC. Then there’s the question if CXMT could procure enough Overlay metrology to support their 17nm expansion for their second fab.

it won’t be easy.
 
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HighGround

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hvpc said:
There is not a straight forward answer to your question. the short answer is, we’ll need:
- a lot more metrology equipment
- more sophisticated fab SPC flow
- scanner with more CDU, Focus, and Overlay correction capabilities
- reliable and higher performance selective etch and deposition equipment than 25nm. since 17nm utilizes SAQP which requires better etch/deposition accuracy. Most complex patterning in 25nm is double exposure, which is more litho intensive

25nm is mainly litho intensive so the burden is on scanner, not process tools like etch and deposition. JHICC has the luxury of using scanner that’s intended for DRAM process that’s 3 to 4 generation more advanced. So even with sub par etcher and deposition, JHICC could get by.

CXMT unfortunately will not have such luxury. If the Dutch government go ahead and restricts advanced scanners, CXMT will be using the same model scanners to make 17nm that JHICC uses to make 25nm. CXMT’s requirement for etcher and deposition will be even more stringent than JHICC. Then there’s the question if CXMT could procure enough Overlay metrology to support their 17nm expansion for their second fab.

it won’t be easy.
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Where is domestic equipment in these areas? I thought etching and deposition were actually areas of strength for China's SEMs.
 
sunnymaxi

sunnymaxi

Major
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HighGround said:
Where is domestic equipment in these areas? I thought etching and deposition were actually areas of strength for China's SEMs.
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did he mention anything about Chinese domestic tools? nope. he just posted the list of tools required for advance DRAM production.

etching and deposition in both sectors Chinese firms doing really well.

@tokenanalyst is the best source right now for Chinese tools. he should have the list of domestic alternatives if available.
 
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hvpc

Junior Member
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HighGround said:
Where is domestic equipment in these areas? I thought etching and deposition were actually areas of strength for China's SEMs.
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According to feedback I received from the fabs, issue with domestic etchers and deposition is ‘reliability’.

everyone recognizes we have domestic tools (except scanner) that could do the job for 28nm logic, 128L 3D NAND, and 10G3 (D1x) DRAM. But tool reliability is not up to par with foreign tools of record….yet.

reliability=tool performing at the same level consistently over time; tool uptime

In our business, an equipment that is consistently bad is better than equipment that are inconsistently good. The first type, we can apply a correction via a feedback loop to address the “bad” part. The latter is simply a headache in an HVM setting. There’s nothing we can do with random inconsistencies on a production line.
 
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tokenanalyst

Brigadier
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hvpc said:
According to feedback I received from the fabs, issue with domestic etchers and deposition is ‘reliability’.

everyone recognizes we have domestic tools (except scanner) that could do the job for 28nm logic, 128L 3D NAND, and 10G3 (D1x) DRAM. But tool reliability is not up to par with foreign tools of record….yet.

reliability=tool performing at the same level consistently over time; tool uptime

In our business, an equipment that is consistently bad is better than equipment that are inconsistently good. The first type, we can apply a correction via a feedback loop to address the “bad” part. The latter is simply a headache in an HVM setting. There’s nothing we can do with random inconsistencies on a production line.
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Well IMHO, the only way that inconsistently good equipment come become a consistently good tool is by use and debugging problems on site. Maybe is just a piece of code or a HV capacitor not working to spec from time to time or in the worst case would be a core expensive component but they will never know if not under the stress conditions of real production environment.

Seeing the quantity of collaborative research between Chinese fabs and US toolmaker in process design I think US companies may have some gratitude to Chinese semi companies for helping their tools to reach even higher standards in the last 40 years and now I think they may fear that export controls are going to force Chinese companies to find and solve these inconsistencies that usually escape tools designers, validation engineers and made them to prefer US made tools.​
 
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HighGround

Senior Member
Registered Member
hvpc said:
According to feedback I received from the fabs, issue with domestic etchers and deposition is ‘reliability’.

everyone recognizes we have domestic tools (except scanner) that could do the job for 28nm logic, 128L 3D NAND, and 10G3 (D1x) DRAM. But tool reliability is not up to par with foreign tools of record….yet.

reliability=tool performing at the same level consistently over time; tool uptime

In our business, an equipment that is consistently bad is better than equipment that are inconsistently good. The first type, we can apply a correction via a feedback loop to address the “bad” part. The latter is simply a headache in an HVM setting. There’s nothing we can do with random inconsistencies on a production line.
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Thank you, I understand.

I guess the issue here is just a lack of experience. As firms use domestic tools more and more, expertise will build, as well as the feedback loops necessary for maintaining reliability.
 
FairAndUnbiased

FairAndUnbiased

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Registered Member
european_guy said:
After Naura and Piotech, now also AMEC builds CVD equipment. CVD field is getting crowded :)

Unfortunately there is no mention to supported process node, just that "can meet the application requirements of filling contact holes and metal tungsten lines in advanced logic devices, DRAM and 3D NAND".
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Deposition equipment doesn't necessarily go by process node CD, only by process node chemical requirements. Even on 65 nm processes you can have very high uniformity on films ie 2.0 +/-0.1 gate oxide thickness.

Instead the requirements change in terms of things like lower particle generation, corrosion resistance, surface chemical cleanliness, wafer platen temperature uniformity, gas delivery uniformity, etc that aren't necessarily specific to leading edge processes.
 
A

Alb

New Member
Registered Member
hvpc said:
There is not a straight forward answer to your question. the short answer is, we’ll need:
- a lot more metrology equipment
- more sophisticated fab SPC flow
- scanner with more CDU, Focus, and Overlay correction capabilities
- reliable and higher performance selective etch and deposition equipment than 25nm. since 17nm utilizes SAQP which requires better etch/deposition accuracy. Most complex patterning in 25nm is double exposure, which is more litho intensive

25nm is mainly litho intensive so the burden is on scanner, not process tools like etch and deposition. JHICC has the luxury of using scanner that’s intended for DRAM process that’s 3 to 4 generation more advanced. So even with sub par etcher and deposition, JHICC could get by.

CXMT unfortunately will not have such luxury. If the Dutch government go ahead and restricts advanced scanners, CXMT will be using the same model scanners to make 17nm that JHICC uses to make 25nm. CXMT’s requirement for etcher and deposition will be even more stringent than JHICC. Then there’s the question if CXMT could procure enough Overlay metrology to support their 17nm expansion for their second fab.

it won’t be easy.
Click to expand...
Thanks a lot. Your expertise is very important to this forum
 
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