D1x lack behind Samsung D1x doesn't mean D1y lack behind Samsung D1y
Chinese semiconductor industry
- Thread starter Hendrik_2000
- Start date
- Status
D1x lack behind Samsung D1x doesn't mean D1y lack behind Samsung D1y
This thing is really interesting
first AI chip integrating memory & computing
sounds like this packages memory with computing unless I am missing something. @hvpc & @tokenanalyst have you seen advanced packaging of SRAM & processing units chiplets into chip. I would imagine this should already have happened with advanced packaging somwhere, right? bonding SRAM with CPU & GPU?
I see this
anyhow, aside from this, they also integrated it with CPU to have a full intelligent drive hardware platform
@PopularScience, I’m not interested in a debate to convince you of the truth nor am I interested in spoon feeding you and walk you through step by step.
I’ll just say this, You certainly are aware CXMT started out with their 10G1 “19nm” node. They didn’t make anything older than 10G1.
If you can’t deduce that TechInsight assessment is on 10G1, which they correctly assessed as 22nm then please go ahead and keep believing in whatever you read in the news.
I’m certainly not about to share the GDS file containing every layer of 10G1 design layout with the exact CD feature size just to prove my point; I’m not about reveal any more details beyond what I already shared.
Then don't post anything. It's poor form to go "trust me, bro" when your assertions are called out.
What point? If you don't back your assertions with evidence, you haven't made any point.
After Naura and Piotech, now also AMEC builds CVD equipment. CVD field is getting crowded
Unfortunately there is no mention to supported process node, just that "can meet the application requirements of filling contact holes and metal tungsten lines in advanced logic devices, DRAM and 3D NAND".
I have hear MRAM and RRAM as alternatives in compute on memory applications no so much SRAM or DRAM but I think putting memory closer will help making computing faster.
In the case of SRAM, Samsung.
In China the company "IC league" has technology for heterogenous integration of DRAM and logic.
Looks the are planning to sell this tools for memory applications and tungsten deposition, they looking to fill the gap with AMAT in the WCVD market, the W stand for tungsten which I don't think was available domestically in China before.After Naura and Piotech, now also AMEC sells CVD equipment. CVD field is getting crowded
Unfortunately there is no mention to supported process node, just that "can meet the application requirements of filling contact holes and metal tungsten lines in advanced logic devices, DRAM and 3D NAND".
AMEC main deposition product is MOCVD
Naura is good a PVD tools, sputtering and such.
Piotech which AMEC is an investor, is the only company in China selling sub-atmospheric chemical deposition tools, necessary for 3DNAND production.
LeadMicro is more in the ALD market of some dielectrics and photovoltaic.
Of course they have products that overlap which is good for competition but looks like everyone is trying to carve a niche market for their own.
I think for now AMEC with their MOCVD tools and now WCVD has made a niche market for their own in China.
And by the way tungsten deposition (W-CVD) is one of the technologies that the stooges think tankers were talking about in their big brain presentation in Washington D.C. to the Chicken-Hawk politicians before the ban on YMTC where they discussed equipment-materials for the production of semiconductor devices and obviously in a demonstration of knowledge of the industry they mostly talked about deposition equipment as if it were the only equipment used in a semiconductor factory, well, they ended up telling the politicians in D.C. that it was necessary to introduce export controls because China did not have this type of equipment, it seems that it did not age well.
AMD had already announced v stacking of SRAM on top of CPU a few years ago, which you had already a link with some info on it. But this is not so prevalent because hybrid bonding/wafer bonding is quite expensive. it probably won’t see wide adoption until the 2nm or 1.4nm node.
as for the H30 chip, I can’t really tell what is going on there based solely on the article. Besides mentioning SRAM, I can’t tell for sure if hybrid bonding was used.
- Status