Chinese semiconductor industry

FairAndUnbiased said:

It seems that most people here follow lithography with greater expertise than I do. What is holding back SMEE from fully exploring the potential of their ArF/KrF instruments and using ArF for 65 nm or KrF for 90 nm?

From my understanding, at these nodes there need to be some tricks such as OPC, which is software I believe, and for the mask, not the lithography instrument itself. Is there anything hardware related that might be holding SMEE back?

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Apparently many hardware parameters affect the accuracy of lithography machine

ID 唐松：请教一下havok，之前听你说面向14nm制程的光刻机要到2024年，而上文说多次曝光可以用于14甚至7nm，这中间是不是有一些条件要达成？比如光罩之类的精度要达到才行？

ID havok：14nm对机器整体套刻精度，ArFi光源中心波长稳定性，浸液系统污染物控制等等众多指标都要求更高。不过现在有些子系统已能满足14nm的制造要求

ID Tang Song: I would like to ask havok. I heard you said that the lithography machine for the 14nm process will not be available until 2024, and the above said that multiple exposures can be used for 14 or even 7nm. Are there some conditions to be met? For example, the accuracy of the mask and the like must be achieved?

ID havok: 14nm has higher requirements for the overall engraving accuracy of the machine, the stability of the central wavelength of the ArFi light source, the control of pollutants in the immersion system, and many other indicators. However, some subsystems are now able to meet the manufacturing requirements of 14nm

Shenzhen Vocational College launches integrated circuit EDA product "Jinguang SPICE"

recently, the EDA product "GOLDEN LIGHT SPICE (GOLDEN LIGHT SPICE)" created by a group of teachers from the School of Integrated Circuits of Shenzhen Vocational and Technical College was officially launched.


It is known that EDA integrated circuits include a series of specific EDA tools, of which SPICE (Program for Simulation with Integrated Circuits Emphasizing Integrated Circuit Simulation Program) developed by the University of California, Berkeley is one. Key technology essential in the entire custom integration. circuit design process. "Jinguang SPICE" released this time is an EDA product developed by the teaching team of Integrated Circuit School of Shenzhen Vocational College based on this technology.


"Jinguang SPICE" supports BSIM3, BSIM4 and BSIM5 at the nanoscale and other advanced process models to achieve high-precision simulation at the transistor level; supports hundreds of circuits such as standard CMOS logic gates, domino circuits, oscillator circuits, BGR circuits, amplifiers and SRAMs Simulation design and principle teaching

Fullerd: The cleaning process of the reserved semiconductor 7nm parts is relatively mature

tonyget said:

This is SMEE 90nm lithography machine core internal component. You can see U-precision's logo on the bottom left corner

View attachment 104734

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Do I see 02 special project letters in the background? Another confirmation that this is real deal

JCET’s XDFOI Chiplet series technology achieves stable mass production​

05/01/2023

JCET announced that the company’s XDFOI Chiplet high-density multi-dimensional heterogeneous integration series process has entered the stable mass production stage as planned, and simultaneously realized the shipment of 4nm node multi-chip system integrated packaging products for international customers, the largest A system-in-package with a package area of approximately 1500mm².
JCET launched XDFOI, a high-density multi-dimensional heterogeneous integration technology platform for Chiplets (small chips) in July 2021, using the concept of collaborative design to realize the integration and testing of finished chip products, covering 2D, 2.5D, and 3D Chiplet integration technology.

JCET XDFOI uses small chip heterogeneous integration technology to place one or more logic chips (CPU/GPU, etc.), as well as I/O Chiplet and/or Or high-bandwidth memory chips (HBM), etc., to form a highly integrated heterogeneous package. On the one hand, the high-density fcBGA substrate can be “slimmed down”, and part of the wiring layer can be transferred to the organic redistribution stacked interposer substrate, taking advantage of the advantages of the minimum line width and line spacing of the organic redistribution stacked interposer layer of 2 μm and multi-layer rewiring to reduce the size of the substrate. On the other hand, part of the interconnection on the SoC can also be transferred to the organic rewiring stacking interposer, so as to realize chiplet-based architectural innovation, and ultimately To achieve the dual advantages of performance and cost.
JCET’s XDFOI technology can control the thickness of the organic redistribution stacked interposer within 50 μm, and the center distance of micro-bumps (µBump) is 40 μm, achieving high-density packaging in a thinner and smaller unit area. Various processes are integrated to achieve higher integration, stronger module functions and smaller package size. At the same time, metal deposition can also be carried out on the back of the package, which can effectively improve the heat dissipation efficiency and at the same time enhance the electromagnetic shielding ability of the package according to the design requirements, and improve the yield rate of finished chips.
JCET XDFOI Chiplet high-density multi-dimensional heterogeneous integration series technology has been applied in high-performance computing, artificial intelligence, 5G, automotive electronics and other fields.

escobar said:

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The title of the article is more than misleading, it is a lie. Chinese EDA has been making inroads in South Korea for a long time. It costs a lot less than Western alternatives and is well suited for memory design. Which is what a significant part of South Korea's chip production is about in the first place.

alright, Loongson is on a roll. After just pushing out 2K1500 a week ago, looks like 2K2000 and 2K2100 have been taped out and ready for production. It comes with its own GPU and 2 LA364 core CPU
According to above link, 2K2000 series is industrial control SoC.

根据龙芯最新披露，基于自研 LoongArch 龙架构、LA364 处理器核的龙芯 2K2000、龙芯 2K2100，均已流片成功。

其中，龙芯 2K2000 具有高性能、接口丰富、功耗伸缩性强等特点，主要应用场景为工控互联网、打印终端、BMC、交换机、边缘网关、工业防火墙、工业平板、智能变电站、挂号自助机等。

龙芯 2K1500、2K1000 的详情未披露，估计应该是 2K2000 的低端版本。

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form this 2K1000 and 2K1500 sounds like they are for lower end models. 2K2000 series for higher end like industrial firewall, web control, BMC, switches, edge gateways, smart electrical substation.

https://zh.m.wikipedia.org/zh-hans/龙芯2号系列
according to Chinese wiki (who knows if this is accurate), 2K2000 series uses 28 nm process and 2K1000 series uses 40 nm process.

Kind of interesting that RISC-V chips are going after the same markets.

tphuang said:

That's where the government subsidies for domestic tools come into play. The big issue with Chinese tools industry isn't the lack of desire for domestic foundries to use them, but rather lack of production capacity. You can only increase head count and production so much. It takes a lot of time to validate new tools with customers in their production process. These things don't happen overnight.

I mean the domestic firms are now winning 60% of bids normally. That's pretty good for 3 months after the October surprise.

That's not what was claimed. The claim was that they have 1 fully domestic production line. They should only more than 1 production line.

Interestingly enough, looks like domestic firms winning 28 out of 40 machines this week with NAURA winning a lot.

Just looking at this, it seems like Japan sanctioning China would be a bigger issue than the Dutch not allowing latest DUVi to be exported to China. They supply so many areas that was previously supplied by American firms.

Pretty sure I've seen Korean firms winning in these bids, so I'm assuming they have at least a couple of areas ahead of China.

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Any idea what production lines Yandong is building, what process it might be?