Chinese semiconductor industry

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FairAndUnbiased

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@dengyeye Thanks bro, so we can equates that packaging is more important than front end Litho?
NAND doesn't require EUV because the key tech is high aspect ratio etching and tightly controlled deposition. it is very hard to double your memory density by halving critical dimensions in 1 axis, much less quadruple it by halving critical dimensions in the other axis. on the other hand it's very easy to add layers - up to a point. But at the point where adding layers is complicated it's EVEN HARDER to shrink critical dimensions.
 

antiterror13

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NAND doesn't require EUV because the key tech is high aspect ratio etching and tightly controlled deposition. it is very hard to double your memory density by halving critical dimensions in 1 axis, much less quadruple it by halving critical dimensions in the other axis. on the other hand it's very easy to add layers - up to a point. But at the point where adding layers is complicated it's EVEN HARDER to shrink critical dimensions.

so what lithography node that YMTC use?
 

PopularScience

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New breakthroughs have been made in the industrialization of key subsystems of domestic immersion lithography machines

Zhejiang Qier Electromechanical Technology Co., Ltd. has good news recently. The high-end integrated circuit equipment has been iterated to the 8th generation. The high-precision liquid temperature control error does not exceed plus or minus 0.001 degrees.

According to the report, Qier Electromechanical undertakes the important task of localizing the immersion liquid control system of the immersion lithography machine, and the immersion liquid system is one of the four core components of the immersion lithography machine. Previously, the related technology has been controlled by a few international giants for a long time.

Since 2004, through the continuous support of the 863 plan, major special projects and the SMEE, the R&D team of Qier Electromechanical has carried out basic research and technical research on the lithography machine immersion system for more than ten years, and undertaken related research projects. More than 10 items, more than 100 authorized invention patents, including 56 invention patents directly related to the lithography machine immersion system.

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FairAndUnbiased

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so what lithography node that YMTC use?
probably the same as every other NAND producer: 30-50 nm, which requires immersion ArF. You can probably relax this to 65 nm and do dry ArF, which China already has. The state of the art is <20 nm, also immersion ArF. So it depends. Specifically to YMTC, they are 20 nm but I'll bet they have backup plans for the case that their immersion ArF gets cut.

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The company, which is currently using a 20nm process to make about 10,000 twelve-inch wafers per month with a 64-layer 3D NAND flash technology, expects to reach 200,000 wafers per month using either a 128-layer or 192-layer technology by 2022. Kau expects Samsung and SK Hynix will each probably have a monthly NAND flash capacity of about 300,000 twelve-inch wafers by 2022.

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Unlike planar NAND, which reduced the cell size at each node, 3D NAND uses a more relaxed process, somewhere between 30nm to 50nm. “Scaling in 3D NAND memory capacity is achieved in a different way: by adding vertical layers,” said Nerissa Draeger, director of university engagements at
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. “In this memory structure, cell density increases directly with the number of layers in the stack.”
The gain from stacking 1 additional layer is doubling cell density so you can see why going 3D is far more economical than trying to shrink planar dimensions. State of the art right now is 128-196 layers.
 
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