Sorry, for which reason?
Chinese semiconductor industry
- Thread starter Hendrik_2000
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Sorry, for which reason?
There is no such thing as “unquantifiable” when equipment manufacturers receiving components and conduct inspection，there is very clear standard on which components deemed pass or not.
Why did they have a timeline with times that didn't match date of first introduction of process？Simple，because this particular components supplier is a relatively new player in the field compare to established Western companies，they are still doing catch up work.
The paper you presented doesn't prove anything. It's a research paper conducted in a lab environment，which bears little resemblance to actual commercial labs. Simple question, there is no EUV machine involved in this experiment，does it mean you can actually produce 5nm chips without EUV now？
I am seeing some chatter about Russian chip designers of the ELBRUS and BAIKAL cpus working with Chinese fabs after loosing access to TSMC.
Which are those fabs? And are they using fully localised supply chain? I imagine the bigger ones like SMIC would be too afraid of loosing Western business.
Which are those fabs? And are they using fully localised supply chain? I imagine the bigger ones like SMIC would be too afraid of loosing Western business.
No, your document is unquantifiable, which is a fact as I quoted from the document directly.
I never said that the process itself is unquantifiable, and I cited an example of an actual SEMI standard which doesn't distinguish between process nodes but only by use case.
do you actually know specific standards or are you just assuming? I don't mean some random timeline from a company but industry standards like SEMI, ASTM or even a large corporate standard like ASML GSA or Lam/Novellus supplier specifications? Because from every single one I've seen, there was never a "nm" label attached to it. It was always a use case label.
As some of these standards are proprietary, you can just check the relevant SEMI or ASTM standards.
For the experiment it is indeed not commercial scale. So what? It is on 200 mm wafer which isn't even suited for logic mass production, of course it's an experiment.
It proves physical possibility and when given a choice between the possible, but not ideal, vs having nothing, the rational choice is to accept lower yield instead of nothing and going bankrupt. And this is an extreme case of 30+ year old equipment being used for leading edge research. The gap is essentially negligible for processes within 2-3 years of each other, maybe a few yield hits or component recleaning.
There's always research into alternative processes like double patterning dry ArF which isn't used commercially but is used if immersion ArF is cut off. Note this paper is from Applied Materials, even major suppliers think about worst case scenarios and how to sell to customers who can't obtain the equipment for a "standard" process.
Is possible to mass produce "5nm" FinFets with immersion lithography the problem is that require more patterning steps than EUV and really good overlay thus is more harder to make but not imposible.
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5nm requires a mix of EUV and DUV. The majority of exposures is till done using DUV and only some steps requires EUV. When ASML advertise a DUV scanner as 5nm capable they simply mean that it is complementary to EUV for 5nm production. 5nm mass production without EUV has never been attempted before so anyone saying that 5nm is possible without EUV is just speculating.
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