I think CETC makes AESA radars
and so is AVIC.
But AVIC doesn't have semiconductor manufacturing capabilities like CTEC.
I think both are in the control list but in term of military semiconductors they are basically independent.
Chinese semiconductor industry
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and so is AVIC.
But AVIC doesn't have semiconductor manufacturing capabilities like CTEC.
I think both are in the control list but in term of military semiconductors they are basically independent.
RF electronics have different constraints than logic. They don't care about feature size, many MMIC (monolithic microwave IC) have feature size in the micron range and use 250 nm process. They are essentially power electronics. As a compound semiconductor they care about chemistry and batch reproducibility.
antiterror13
Brigadier
True, but the signal processing in the back-end would improve a lot with the most advanced node (i.e 7nm or even 5nm) or not ?
Here is an example of a cutting edge SAR (synthetic aperture radar) ASIC from Xi'an Polytechnic University, fabbed on 65 nm. Synthetic aperture radar is a radar imaging technique rather than just 3-D position and velocity data.
SMEE sold one lithography machine. 90nm??
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That will depends on various factors like the architecture of the chips, the architecture makes a huge difference in performance, so much than an old GPU can beat most modern manycore CPUs in parallel related tasks, so if someone is expecting than a 5nm manycore CPU will beat a 28nm multicore DSP chip, i think will be disappointed.
Just look how the Chinese where able to develop exascale supercomputers out of older nodes.
CTEC DSP processors where able to get good performance probably using older nodes by using an efficient architecture.
Hunxin 2A has just been released, and its single core performance is four times higher than that of the current international similar chips. On April 23, 2018, 38 Institute of CETC released hunxin 2a, which adopts fully independent architecture and takes six years to develop. Compared with hunxin 1, hunxin 2A’s performance has been improved by six times. By means of changing single core into multi-core, expanding operation unit and upgrading instruction system, hunxin 2A’s performance has been improved by 100 billion floating-point operations at the same time, It has relatively good application environment and debugging means; It takes only 1.6 microseconds to implement 1024 floating-point FFT (fast Fourier transform) with a single core. The computing efficiency is 3 times higher than that of Texas Instruments tms320c6678, and the actual performance is 1.7 times. The data throughput of the device reaches 240gb / s.Just look how the Chinese where able to develop exascale supercomputers out of older nodes.
CTEC DSP processors where able to get good performance probably using older nodes by using an efficient architecture.
If power is not a concern, advanced packaging could also make a big difference, a complex chiplet made by multiple chips with a good architecture even if made in a older process node could beat in raw performance a chip made in newer nodes.
Comparing apples to apples, two processors using the same architecture and design, the one with a smaller node might have more performance, how much? Again, coming back to the architecture, an inefficient architecture will NOT produce a huge jump in performance just because it is based on a modern fabrication node.
Huawei proposes vertical transistor for 3D-DRAM
May 30, 2022China’s communications equipment giant Huawei has proposed a vertical channel-all-around (CAA) transistor that could be suitable for the construction of 3D-DRAM. The proposal is contained in a paper to be presented at the 2022 IEEE Symposium on VLSI Technology and Circuits scheduled to take place from June 12 to 17
China’s communications equipment giant Huawei has proposed a vertical channel-all-around (CAA) transistor that could be suitable for the construction of 3D-DRAM.
The proposal is contained in a paper to be presented at the 2022 IEEE Symposium on VLSI Technology and Circuits scheduled to take place from June 12 to 17, in Honolulu, Hawaii.
The device is an indium gallium zinc oxide (IGZO) field effect transistor (FET) with layers of IGZO, high-k dielectric hafnium oxide and IZO organized around a vertical column. The IGZO thickness is about 3nm. The HfOx and IZO are about 8nm thick. The channel length – in the vertical direction is 55nm and the critical dimension in-plane is 50nm
The transistor achieves a current density of 32.8microamps/micron at Vth plus 1V with a sub-threshold swing of 92mV/decade.
The authors claim good thermal stability and reliability from -40 degrees C to +120 degrees C and the transistor makes a promising candidate for high-performance 3D DRAM beyond 1-alpha nodes in the future.
Do anyone has some info on this Zhejiang Luyuer Semiconductor Equipment? Website, etc?
For what I know the only Chinese firm that produces ion implanters is Kingstone Technology Ltd. ()
@european_guy bro what about CETC? the excitement and joy of being a Chinese Semiconductor watcher, you don't know what you gonna get. Plus Ignore it at your owned peril...lol
Mar 17, 2021 — The ion implanters are all made in China and can provide a one-stop service for global chipmakers, the CETC added.
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