Chinese semiconductor industry

hvpc said:

@Michaelsinodef, there is a lot of effort needed to take a system good enough for 28nm production to enable 14nm/10nm/7nm.

I mentioned this before, imaging resolution is all everyone ever talk about. Just because you could meet requirement for 28nm, one can't simply execute multiple patterning and expect to enable 14nm.

The overlay requirement for the most difficult step of 28nm node is 5nm-ish. SMIC's 14nm node overlay is like 3.5nm (that's a 30% improvement), and for 7nm node it's closer to 2~2.5nm. With multiple patterning, it's even more difficult than just 5nm to 3.5nm improvement...the extra patterning makes the need for more steps to match to one another steps is even more complex than simple 28nm technology.

28nm are typically made with ASML NXT1950i. SMIC uses NXT1980/NXT2000 for their 14nm. These are three and four generation more advanced systems than the 28nm system. In real life, it's not as easy as everyone seemed to make it out to be.

Since no one know what performance SMEE's immersion system is targeting. No one really knows for sure what this initial system could do. Everyone one on the web assumes 28nm. Because this is basically one of the last of the plane node. at 14nm below requires FINFET....so it's assumed 28nm would be a good target for SMEE to conquer first. But then, again, SMEE could be shooting for the moon/bet big on their first attempt.

But if 28nm is indeed SMEE's initial target, then to go to 14nm and below will require SMEE to put in even more effort.

Hope this explanation makes sense to you. If not, let me know, I can explain in more detail to you in private so I don't spam others.

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hvpc said:

@Michaelsinodef, there is a lot of effort needed to take a system good enough for 28nm production to enable 14nm/10nm/7nm.

I mentioned this before, imaging resolution is all everyone ever talk about. Just because you could meet requirement for 28nm, one can't simply execute multiple patterning and expect to enable 14nm.

The overlay requirement for the most difficult step of 28nm node is 5nm-ish. SMIC's 14nm node overlay is like 3.5nm (that's a 30% improvement), and for 7nm node it's closer to 2~2.5nm. With multiple patterning, it's even more difficult than just 5nm to 3.5nm improvement...the extra patterning makes the need for more steps to match to one another steps is even more complex than simple 28nm technology.

28nm are typically made with ASML NXT1950i. SMIC uses NXT1980/NXT2000 for their 14nm. These are three and four generation more advanced systems than the 28nm system. In real life, it's not as easy as everyone seemed to make it out to be.

Since no one know what performance SMEE's immersion system is targeting. No one really knows for sure what this initial system could do. Everyone one on the web assumes 28nm. Because this is basically one of the last of the plane node. at 14nm below requires FINFET....so it's assumed 28nm would be a good target for SMEE to conquer first. But then, again, SMEE could be shooting for the moon/bet big on their first attempt.

But if 28nm is indeed SMEE's initial target, then to go to 14nm and below will require SMEE to put in even more effort.

Hope this explanation makes sense to you. If not, let me know, I can explain in more detail to you in private so I don't spam others.

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Michaelsinodef said:

Thanks for your response.

Like I mentioned in my post, have been loosely following this thread (and in general semiconductors) so in general I really cannot follow when stuff gets really technical, but am still able to get the 'gist'/general trend of things (which is things are improving for China in regards to becoming self-sufficient and stuff like the 28nm DUV from SMEE is a big deal).

And one of the things I picked up was that the ASML 28nm could make 14/10/7 nm, so I just automatically assumed that the 28nm SMEE should also be able to do it (at least at some point in the future, as like you said, it most likely need upgrades, effort and time before it can).

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tokenanalyst said:

I term of overlay precision Beijing U-Precision claims to have archived 2.5nm with their DWSi (i stand for immersion) wafer stage, officially in 2018 they their overlay stand at 4.5 nm.
View attachment 86832
But i know there is more factors to archive a good multi-patterning that overlay alone will not give and those factors has to do with the mask and photoresist, so there is when software OPC comes, ASML scanners are good because their software is really good. So i know CAS is making a gigantic effort in software lithography but i didn't find a company doing that service in China so maybe SMEE is doing all the software with CAS.

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hvpc said:

This is just stage accuracy of 2.5nm. This is not the same as actual overlay. There are other contributors that will make actual overlay error much larger. And SMEE has to implement all the necessary software corrections.

at 28nm, relying on just the basic assembly of hardware would be enough. Going to FinFET a lot of software control and correction are musts.

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tokenanalyst said:

that is what i say in the second part i just used overly and accuracy interchangeably.
CAS is doing a gigantic effort in software lithography according to patents and research i have found but i didn't find many companies in that area, that lead to believe that SMEE and others are working CAS in that area. Software for 28nm is probably easier to develop and then develop from that experience, that is maybe why they are targeting 28nm.

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tokenanalyst said:

that is what i say in the second part i just used overly and accuracy interchangeably.
CAS is doing a gigantic effort in software lithography according to patents and research i have found but i didn't find many companies in that area, that lead to believe that SMEE and others are working CAS in that area. Software for 28nm is probably easier to develop and then develop from that experience, that is maybe why they are targeting 28nm.

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BoraTas said:

28 nm is important for experience but as you probably know, it is also the most cost-effective node. Businesses usually just use chips using 28 nm node if they are not limited by power or space. It is likely to become the standard semiconductor node for cars, industrial machinery, and home appliances unless this changes.
View attachment 86834

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hvpc said:

Do you know when data in your chart is from? wafer price are higher now so I wonder if 28nm is still sweet spot.

When I worked on 28nm several years ago, initially it was like $6-7K per wafers. Then when everyone has 28nm capability, price drop because not much demand. I think SMIC only two year ago sells at low $2K per wafer. But past two years everyone is finding 28nm to be sweet spot, maybe because of low wafer price which your chart supports. But with increase demand and recent supply issue, 28nm price I hear is like $3K now. So I wonder what chart you share would look like if updated with new prices for all the nodes.

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