Read an interesting analysis on Ascend 950 DT memory

There's an image of an Ascend 950 DT chip going around which shows only 4 memory chips around the compute die, instead of the standard 8 for HBM. Huawei has said they are using a custom designed memory, HiZQ 2.0, for the Ascend 950 series, so not being standard is expected.
If you calculate the specs of each individual memory chips from the announced specs, each die would have 36GB capacity / 1TB bandwith, which is actually HBM3e level. There is also speculation that Huawei sources their DRAM chips from JHICC with a dedicated production line and relaxed design constraints to get HBM3e level specs without meeting the entire standard. Some semi analysts believe the HBM standard is the only path for AI chips, but this may be a faulty assumption with highly integrated in-house memory designs.

There's an image of an Ascend 950 DT chip going around which shows only 4 memory chips around the compute die, instead of the standard 8 for HBM. Huawei has said they are using a custom designed memory, HiZQ 2.0, for the Ascend 950 series, so not being standard is expected.
If you calculate the specs of each individual memory chips from the announced specs, each die would have 36GB capacity / 1TB bandwith, which is actually HBM3e level. There is also speculation that Huawei sources their DRAM chips from JHICC with a dedicated production line and relaxed design constraints to get HBM3e level specs without meeting the entire standard. Some semi analysts believe the HBM standard is the only path for AI chips, but this may be a faulty assumption with highly integrated in-house memory designs.
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