FlipFET technology opens a new era of 3D integration.
The FlipFET proposed by the Peking University team is not a "partial improvement" to the CFET, but a fundamental reconstruction of the technical path of three-dimensional integration through a new design of "double-sided active area + flip chip + back-to-back self-alignment". Its core advantage is reflected in the precise solution to the pain points of the four major industries.
FlipFET abandons the "vertical stacking of the same wafer" idea of CFET and adopts the "dual wafer bonding + flip thinning" process .
First, n-type transistors are manufactured on the front wafer , and then the back wafer is bonded, flipped, and thinned to manufacture p-type transistors on the back.
Through "planar distribution + double-sided layout", high-density integration of n/p transistors is achieved while avoiding the leakage current and alignment problems caused by vertical stacking.
FlipFET uses "self-aligned active area" technology to achieve "automatic alignment" of key transistor structures, significantly reducing dependence on photolithography accuracy;
At the same time, the introduction of "back-side lithography correction" can correct manufacturing deviations in real time and control the critical alignment error within 10 nanometers (far lower than the 5-nanometer requirement of CFET), with significant potential for yield improvement.
The entire manufacturing process of FlipFET adopts a low-temperature process below 400°C, which is perfectly compatible with the current mainstream copper interconnection technology and does not require changing materials or rebuilding production lines.
This means that manufacturers can achieve technological iteration without incurring huge upgrade costs, greatly lowering the threshold for commercialization.
Unlike the "fixed stack structure" of CFET, FlipFET supports "on-demand adjustment" and can adapt to both the fin structure of FinFET and the next-generation GAA nanosheet.
It is suitable for both high-density AI chips and low-power mobile chips. This versatility makes it a more viable technology solution than CFET.
