High purity synthetic quartz development is a huge deal.
I probably have data on this somewhere, but why do I need to be that exact?
China doesn’t have an ai chip shortage issue. This should be obvious by now.
Chinese semiconductor thread II
- Thread starter vincent
- Start date
China doesn’t have an ai chip shortage issue. This should be obvious by now.
AMEC 3DNAND Patent
Summary of the invention
The purpose of the present invention is to expand the process window of a semiconductor structure for forming holes or grooves of different depths and different aspect ratios. By adjusting the bias RF power and the type and flow rate of the etching gas, the margin of the cut-off layer in holes of different depths and different aspect ratios can be regulated, so that the margin of the cut-off layer in a deep hole with a large aspect ratio can be slightly smaller than or equal to the margin of the cut-off layer in a hole of medium depth and a small aspect ratio.
In order to achieve the above object, the present invention provides a method for processing a semiconductor structure, comprising the following steps:
A substrate is provided, the substrate comprising a base layer arranged on a substrate, the base layer having a slope structure formed by gradually extending the side from the top surface toward the substrate, the slope structure is covered with a cut-off layer, and a dielectric layer is arranged on the cut-off layer;
Turning on the source radio frequency and the bias radio frequency, introducing the first etching gas, etching the dielectric layer to form a plurality of first-type holes, second-type holes and third-type holes with different aspect ratios, until the third-type holes expose the cutoff layer; wherein the aspect ratio of the third-type holes is greater than the aspect ratio of the second-type holes and greater than the aspect ratio of the first-type holes ;
Reducing the power of the bias radio frequency so that the openings of the first type of holes, the second type of holes, and the third type of holes are lateral-etched for a preset time;
A second etching gas is introduced to etch the cutoff layer exposed by the third type of holes. During the etching process, the flow rate of the second etching gas increases linearly with the etching time at a slope k until the cutoff layer of the third type of holes is etched to a preset depth.
Compared with the prior art, the technical solution of the present invention has at least the following technical effects:
The present invention reduces the power of bias radio frequency until the third type of hole exposes the cutoff layer, so that the bottom characteristic dimension (BCD) of the bottom of the third type of hole can be opened, which is convenient for etching the cutoff layer in the third type of hole, and can increase the carbon-containing deposition layer of the second type of hole, thereby delaying the etching of the cutoff layer in the second type of hole.
Furthermore, the present invention also introduces a second etching gas that is beneficial to etching deep holes. The flow rate of the second etching gas increases linearly, so that the cutoff layer in the third type of hole can be etched to a set depth, while only the carbon-containing deposition layer is consumed in the second type of hole. The cutoff layer in the second type of hole is almost not etched, thereby achieving control of the remaining amount of the cutoff layer in through holes or grooves of different depths and different aspect ratios, and expanding the process window for penetrating the cutoff layer process.
The purpose of the present invention is to expand the process window of a semiconductor structure for forming holes or grooves of different depths and different aspect ratios. By adjusting the bias RF power and the type and flow rate of the etching gas, the margin of the cut-off layer in holes of different depths and different aspect ratios can be regulated, so that the margin of the cut-off layer in a deep hole with a large aspect ratio can be slightly smaller than or equal to the margin of the cut-off layer in a hole of medium depth and a small aspect ratio.
In order to achieve the above object, the present invention provides a method for processing a semiconductor structure, comprising the following steps:
A substrate is provided, the substrate comprising a base layer arranged on a substrate, the base layer having a slope structure formed by gradually extending the side from the top surface toward the substrate, the slope structure is covered with a cut-off layer, and a dielectric layer is arranged on the cut-off layer;
Turning on the source radio frequency and the bias radio frequency, introducing the first etching gas, etching the dielectric layer to form a plurality of first-type holes, second-type holes and third-type holes with different aspect ratios, until the third-type holes expose the cutoff layer; wherein the aspect ratio of the third-type holes is greater than the aspect ratio of the second-type holes and greater than the aspect ratio of the first-type holes ;
Reducing the power of the bias radio frequency so that the openings of the first type of holes, the second type of holes, and the third type of holes are lateral-etched for a preset time;
A second etching gas is introduced to etch the cutoff layer exposed by the third type of holes. During the etching process, the flow rate of the second etching gas increases linearly with the etching time at a slope k until the cutoff layer of the third type of holes is etched to a preset depth.
Compared with the prior art, the technical solution of the present invention has at least the following technical effects:
The present invention reduces the power of bias radio frequency until the third type of hole exposes the cutoff layer, so that the bottom characteristic dimension (BCD) of the bottom of the third type of hole can be opened, which is convenient for etching the cutoff layer in the third type of hole, and can increase the carbon-containing deposition layer of the second type of hole, thereby delaying the etching of the cutoff layer in the second type of hole.
Furthermore, the present invention also introduces a second etching gas that is beneficial to etching deep holes. The flow rate of the second etching gas increases linearly, so that the cutoff layer in the third type of hole can be etched to a set depth, while only the carbon-containing deposition layer is consumed in the second type of hole. The cutoff layer in the second type of hole is almost not etched, thereby achieving control of the remaining amount of the cutoff layer in through holes or grooves of different depths and different aspect ratios, and expanding the process window for penetrating the cutoff layer process.
There's also the possibility that it is an apples-to-oranges comparison (Ascend fp16 vs H100 fp8). If that turns out to be the case, then 910C may actually be able to 100% match H100 on an apples-to-apples comparison (Ascend fp16 vs H100 fp16). I wrote about it before on AI thread.
Artificial Intelligence thread
This morning I wake up and a whole bunch of more OEMs, chip makers and server providers are saying they are using or support DeepSeek models. This is a phenomenon. I have never seen anything like this where the entire Chinese social media are basically using their models for anything and everything.
www.sinodefenceforum.com
Nanjing, Jiangsu, invested 5 billion yuan in integrated circuits and other fields
The Jiangsu Nanjing Advanced Manufacturing Industry Special Fund with a total scale of 5 billion yuan was officially settled in Nanjing Pukou Economic Development Zone. The fund was funded by Pukou District and is one of the second batch of special funds signed by Jiangsu Province's strategic emerging industry fund.
According to the news released by Pukou, Jiangsu Nanjing Advanced Manufacturing Industry Special Fund focuses on intelligent equipment (robots, industrial mother machines, construction machinery, rail transit equipment), integrated circuits (chip manufacturing, chip packaging, key materials and equipment), new energy vehicles (new energy vehicles, power batteries, intelligent networked vehicles) and other fields. It adopts the "sub-fund as the main and direct investment as the supplement" model to carry out investment, focusing on supporting cutting-edge directions such as industrial robots and chip manufacturing, and helping to build an advanced manufacturing cluster with international competitiveness.
According to the news released by Pukou, Jiangsu Nanjing Advanced Manufacturing Industry Special Fund focuses on intelligent equipment (robots, industrial mother machines, construction machinery, rail transit equipment), integrated circuits (chip manufacturing, chip packaging, key materials and equipment), new energy vehicles (new energy vehicles, power batteries, intelligent networked vehicles) and other fields. It adopts the "sub-fund as the main and direct investment as the supplement" model to carry out investment, focusing on supporting cutting-edge directions such as industrial robots and chip manufacturing, and helping to build an advanced manufacturing cluster with international competitiveness.
take it with a grain of salt. no idea how reliable it is . Here is what i am hearing
1)YMTC chopped off the order for 30 ASML systems and turned to domestic system.
2)SMIC 28nm expansion utilization of domestic equipments reached 92%
3)JiaSin ArF photoresist yield rate is 85% and has orders coming from Samsung too
4)domestic Photoresist market share increased from 3% to 41%
5)SMEE has an outstanding order 68 systems.
6)The EUV integration site is at Lingang, already in testing stage, first EUV rolls out third quarter 2025.
7)domestic Lithography equipment has created 500K jobs.
8)Ren Zhengfei reportedly promised president Xi in the recent meeting that China will have at least 70% self sufficiency in chips by 2028.
Huawei has made breakthrough in EUV mirrors.
1)YMTC chopped off the order for 30 ASML systems and turned to domestic system.
2)SMIC 28nm expansion utilization of domestic equipments reached 92%
3)JiaSin ArF photoresist yield rate is 85% and has orders coming from Samsung too
4)domestic Photoresist market share increased from 3% to 41%
5)SMEE has an outstanding order 68 systems.
6)The EUV integration site is at Lingang, already in testing stage, first EUV rolls out third quarter 2025.
7)domestic Lithography equipment has created 500K jobs.
8)Ren Zhengfei reportedly promised president Xi in the recent meeting that China will have at least 70% self sufficiency in chips by 2028.
Huawei has made breakthrough in EUV mirrors.
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Like I said before, like with supercomputers, China is hiding much more than they are showing in their semiconductor industry.
-68 systems is pretty credible given capacity expansion of RSLASER. That I posted a few years ago.
Chinese semiconductor industry
Some info from the public environmental report of RSLaser, looks like that the project for the mass production and refurbishing of high power high repetition rate KrF, ArF, ArFi excimer lasers, given the size scope of this project, is to mass produce a decent quantity of excimer laser powered...
www.sinodefenceforum.com
Chinese semiconductor industry
I have to dig up where I got the information from but the number of ascend developers have grown from under 100k in 2020 to 1.5 million now. I think all because Huawei came out with ascend 910 back in 2019. And since it was far and away the most competitive domestic GPU back then, all the...
www.sinodefenceforum.com
-92% 28nm domestic equipment utilization? I know that since 2021-2022 there are close 100% domestic foundries lines producing at a smaller scale, my guess is to qualify domestic equipment a fast as possible, I don't know how that is translating to the larger foundries but looks like is having an effect. I posted before of one of these smaller fabs that is managed Shanghai Integrated Circuit Equipment Materials Industry Innovation Center Co., Ltd.
-YMTC chopping ASML orders? possible given that ASML is banned from servicing them, is wouldn't be surprising that they are opting for domestic lithography tools, like domestic KrF scanners that are pretty useful in 3D NAND.
-In EUV I believe that given the focus in mask and photoresists they already have hardware, so a good prototype may seem closer that most people think and they are going High.