Chinese semiconductor thread II
- Thread starter vincent
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posted my thought here on this topic.
It's a rather significant event to have a foreign IDM getting stuff fabb'd in China by a local foundry so that they don't lose access to the Chinese market. This is going to put pressure on TI, ADI, Renesas, Infineon & NXP to do the same.
虎嗅通过与多位从业者及投资人沟通后得知，路透社提到的“7纳米及更先进制程工艺的芯片”的表述也不完全准确。
前台积电工程师、蓉和半导体咨询CEO吴梓豪向笔者表示，就目前掌握的信息来看，新的审查标准将围绕“300平方毫米”和“7nm工艺节点”两项指标展开，最终还是会落在晶体管数量上。
根据测算，在7纳米制程工艺下，每平方毫米约有1亿枚晶体管。以Die Size（裸片尺寸）为300平方毫米为上限，最终晶体管数量将不超过300亿个。
举个更直观的例子，2020年发布的英伟达A100芯片，其晶体管数量为542亿；某款与英伟达A100对标，且已经广泛运用在算力集群搭建的国产AI芯片，其晶体管数量约为500亿个。
也就是说，即便不考虑后续芯片架构升级，现阶段的国产AI芯片，基本全都面临着接受审查的问题。一个可能的情况是，未来国产AI芯片将再无法使用中国大陆以外的产能进行生产。
After communicating with many practitioners and investors, Huxiu learned that the statement of "chips with 7-nanometer and more advanced process technology" mentioned by Reuters is not entirely accurate.
Wu Zihao, former TSMC engineer and CEO of Ronghe Semiconductor Consulting, told the author that based on the information currently available, the new review standards will revolve around the two indicators of "300 square millimeters" and "7nm process node", and will ultimately fall on the number of transistors.
According to calculations, under the 7-nanometer process technology, there are about 100 million transistors per square millimeter. With the die size of 300 square millimeters as the upper limit, the final number of transistors will not exceed 30 billion.
To give a more intuitive example, the Nvidia A100 chip released in 2020 has 54.2 billion transistors; a domestic AI chip that is comparable to the Nvidia A100 and has been widely used in computing clusters has about 50 billion transistors.
In other words, even without considering the subsequent chip architecture upgrade, domestic AI chips at this stage are basically all facing the problem of being reviewed. One possible scenario is that in the future, domestic AI chips will no longer be able to be produced using production capacity outside of mainland China.
在新规中，小芯片厂商基本都不在限制范围内，比如手机上的SoC，尽管目前手机的主流SoC工艺制程基本都在7纳米及以下，但SoC的Die Size（裸片尺寸）较小，因此即便是更先进的制程节点，也不会受到更多限制。
吴梓豪表示，就Die Size和晶体管总数来看，未来国产SoC推进到台积电3纳米制程问题不大。
值得一提的是，虎嗅结合多方信源得知，国内某大厂自研的3纳米SoC项目，已于前不久在台积电完成流片，预计在明年下半年规模量产。
而在“大芯片”厂商中，ADAS（高级驾驶辅助系统）芯片可能会受到部分影响，因为目前国内自研的ADAS芯片，部分尺寸都在300平方毫米左右，且采用的工艺制程为7纳米。
至于究竟哪些国内ADAS芯片厂商会受到影响，还需要在台积电新规细则公布后讨论。
但基本可以肯定的一点是，AI芯片几乎全部在新规的限制中，以英伟达A100芯片为例，其使用7纳米工艺制程的基础上，Die Size约为826平方毫米，其他性能接近的国产AI芯片的Die Size也近似于这个尺寸。
这种情况下，国产AI芯片的流片将无法再依赖台积电，大概率需要转单到中国大陆。而在大陆的代工厂商中，在先进制程领域中，基本靠中芯国际独扛大旗。
In the new regulations, small chip manufacturers are basically not restricted. For example, although the mainstream SoC process of mobile phones is basically 7 nanometers or below, the die size of SoC is small, so even more advanced process nodes will not be subject to more restrictions.
Wu Zihao said that in terms of die size and the total number of transistors, it will not be a big problem for domestic SoC to advance to TSMC's 3-nanometer process in the future.
It is worth mentioning that Huxiu learned from multiple sources that a domestic large-scale self-developed 3-nanometer SoC project has been completed at TSMC not long ago, and is expected to be mass-produced in the second half of next year.
Among the "big chip" manufacturers, ADAS (advanced driver assistance system) chips may be partially affected, because some of the domestic self-developed ADAS chips are about 300 square millimeters in size and use a 7-nanometer process.
As for which domestic ADAS chip manufacturers will be affected, it still needs to be discussed after the details of TSMC's new regulations are announced.
But one thing that is basically certain is that almost all AI chips are subject to the restrictions of the new regulations. Taking Nvidia A100 chip as an example, based on its 7nm process, the die size is about 826 square millimeters. The die size of other domestic AI chips with similar performance is also close to this size.
In this case, the tape-out of domestic AI chips will no longer rely on TSMC, and it is likely that orders will need to be transferred to mainland China. Among the foundry manufacturers in mainland China, in the field of advanced processes, SMIC basically carries the banner alone.
真正可能存在限制的是产能问题。按照中芯国际此前发布的财报，今年3季度，公司各条产线的整体稼动率已经达到90.4%，月产能达到88.43万片。即便是明年中芯国际的产能100%的满载，所能提供的产能对于中国大陆AI芯片厂商来说，依然是杯水车薪。
The real limitation may be the capacity problem. According to the financial report previously released by SMIC, in the third quarter of this year, the overall utilization rate of the company's production lines has reached 90.4%, and the monthly production capacity has reached 884,300 pieces. Even if SMIC's production capacity is 100% full next year, the production capacity it can provide is still a drop in the bucket for AI chip manufacturers in mainland China.
有从业者向笔者表示，相较于台积电代工的限制，他们更担心的是HBM（高带宽内存）芯片供应受限。
用一个不完全准确的例子说明，在大模型训练中，AI芯片需要处理大量的并行数据，其中算力决定了每秒处理数据的速度，而带宽则决定了每秒可访问的数据，HBM的设计初衷就是向GPU提供更多的内存及带宽需求。
就目前的行业现状来看，AI芯片的算力增长幅度是要高于带宽增长的，这使得GPU资源实际上并没有得到充分利用。
在全球范围内，能够量产HBM芯片的只有SK海力士、三星及美光三家，且前两者去年的市场份额合计达到91%。
而对于国内AI芯片厂商来说，SK海力士的主要产能基本被英伟达等大厂包揽，美光对国内出口存在限制，三星的HBM芯片几乎是他们唯一能够拿到的HBM产品。
Some practitioners told me that compared with the limitation of TSMC's foundry, they are more worried about the limited supply of HBM (high bandwidth memory) chips.
To use an inaccurate example, in large model training, AI chips need to process a large amount of parallel data, where computing power determines the speed of processing data per second, and bandwidth determines the data that can be accessed per second. The original intention of HBM design is to provide more memory and bandwidth requirements to GPUs.
Judging from the current industry situation, the growth rate of computing power of AI chips is higher than the growth rate of bandwidth, which makes GPU resources not fully utilized.
Globally, only SK Hynix, Samsung and Micron can mass-produce HBM chips, and the market share of the former two last year reached 91%.
For domestic AI chip manufacturers, SK Hynix's main production capacity is basically monopolized by large manufacturers such as Nvidia, Micron has restrictions on domestic exports, and Samsung's HBM chips are almost the only HBM products they can get.
从去年开始，国内晶圆厂对设备的国产化需求，甚至已经到了对设备上的零部件逐一排查的地步。
此前，就有半导体设备制造商向笔者提到，她所接触的客户中，就有不少人表示，哪怕设备上的进口零部件可以保证三年不出故障，而国产零部件只能用一年，还是得用国产。
“因为他们中间，真的有厂商经历过因无法取得进口设备零件，导致设备停工半年的情况。”这位半导体设备制作商表示。
另结合多位从业者的判断，目前国内晶圆代工的情况是，除光刻机外，28纳米及以上的工艺制程，半导体设备国产化较高，虽尚未实现“完全国产化”，但足以保障芯片安全。
Since last year, domestic wafer factories have been demanding localization of equipment, and have even checked every component on the equipment one by one.
Previously, a semiconductor equipment manufacturer mentioned to the author that many of the customers she has contacted said that even if the imported components on the equipment can be guaranteed to be fault-free for three years, while the domestic components can only be used for one year, they still have to use domestic components.
"Because some of them have really experienced the situation where the equipment was shut down for half a year due to the inability to obtain imported equipment parts." The semiconductor equipment manufacturer said.
In addition, combined with the judgment of many practitioners, the current situation of domestic wafer foundry is that, except for lithography machines, the localization of semiconductor equipment for 28 nanometers and above process is relatively high. Although it has not yet achieved "complete localization", it is enough to ensure chip safety.
It's actually pretty incredible how many Chinese chips has popped up over the last few years, it's now possible to switch some designs to almost all Chinese branded chips on LCSC, was impossible 3 years ago
antiterror13
Brigadier
yeapp, but mostly for very matured nodes 55nm and over
Extremly few in the industry care about node size, the overwheling majority of chips in electrical devices look at other performance attributes.
Case in point you can now find half a dozen Chinese brands of digital isolators going up to 150 Mbps on LCSC, a few years ago it was mostly just SiliconLabs and TI, a few very expensive ones from Analog, few if any of them went up to 150 Mbps and they're all 3 to 5 times more expensive
antiterror13
Brigadier
Did I say many care about the node? I didn't ... I just mentioning the fact and China need to (quickly) move up the ladder to 14nm and above ... 28nm is currently the sweet spot and soon 14nm. Only 1 company in China that can make 14nm to 7nm which is SMIC, soon will be 2 or 3 though
Google translated:
"Industry Observation: With the advent of the listing boom, domestic GPUs still face five major challenges"
....
Google translated: "TSMC reportedly slows down CoWoS capacity expansion in 2026"
"Industry Observation: With the advent of the listing boom, domestic GPUs still face five major challenges"
....
Google translated: "TSMC reportedly slows down CoWoS capacity expansion in 2026"