Chinese semiconductor thread II

tokenanalyst

Brigadier
Registered Member
Another interesting presentation on photoresist.

Nankai University gave a report titled "EUV Photoresist for 0.55NA Advanced Lithography".

In the report, they described their use of a heterogeneous metal nanocluster strategy combining titanium and zirconium metals to study their solubility, evaluate the applicability of different developers, and test their performance in electron beam lithography (EBL) and extreme ultraviolet (EUV) lithography, while studying their etching resistance during pattern transfer. The study showed that R-4 photoresist can achieve a resolution of 25 nanometers at a low dose under electron beam lithography and a resolution of 50 nanometers under EUV lithography, with a sensitivity of up to 19.7 mJ·cm −2 . This study proposed an efficient heterometallic method for optimizing the lithographic performance of metal oxide cluster photoresists, which provides strong support for the development of commercially viable next-generation EUV photoresists.​
 

tokenanalyst

Brigadier
Registered Member

Completed the production of 8.6 generation linear evaporation source equipment prototype.​


The company has leading technological advantages in the field of OLED linear evaporation source equipment. Its 6th generation evaporation source has successfully broken the foreign monopoly and achieved import substitution. The product technical indicators have reached the international advanced level. Among the 6th generation AMOLED linear evaporation sources tendered and purchased by domestic panel manufacturers, the company is the only domestic supplier.

At the same time, Alight is mainly focusing on the silicon-based OLED track and is steadily advancing the research and development and market promotion of silicon-based OLED evaporation machines.

The company has successfully achieved full coverage of the six major panel manufacturers including BOE, CSOT, Tianma, Visionox, Hehui and Tonly.

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Hyper

Junior Member
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Looks like TSMC’s 2nm node will increase their lead over everyone else by quite a bit. SRAM scaling for 3nm nodes at TSMC was pretty much nonexistent but their 2nm node promises big improvements in SRAM scaling.
Just for a single node. It will stagnate till cfet.
 

Hyper

Junior Member
Registered Member
Reductions in area will have to happen with transistor redesigns instead of just relying on scaling laws.
I think eventually someone will come up with something to replace SRAM. At least for L3 cache and the like.
Amd 3d v-cache.
 
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