Anyone can translate the Chart for us non Chinese speaking lurkers?
Chinese semiconductor thread II
- Thread starter vincent
- Start date
I already translated everything you need to know
Is it DUV or EUV that will start mass production?
Pytorch is the part that most developers, the customers will use and face. The backend and low level optimizations will be handled by Huawei people.
NORTH CHINA HUACHUANG WAS LISTED IN THE "TOP 100 NEW ENTITY ENTERPRISES" LIST
The China Enterprise Evaluation Association announced the list of "2023 New Entity Enterprises TOP100", and North Huachuang successfully ranked 85th on the list with its strong innovation strength. The winning of this honor highlights the company's remarkable achievements in the real economy and technological innovation.
"2023 New Entity Enterprises TOP100" is an authoritative ranking list released by the China Enterprise Evaluation Association, which has been held for three consecutive years. In this year's selection, the jury selected the best from more than 17,000 enterprises across the country and selected the 100 entity enterprises with the strongest comprehensive strength. The award comprehensively measures the performance of enterprises in the real economy, technological innovation, and digital empowerment of the industrial chain from multiple evaluation dimensions such as enterprise entity, technology, and ecological inclusiveness.
NAURA has been deeply involved in the field of basic semiconductor products, insisting on innovation-driven development, deeply integrating digital technology into production and services, and winning customer satisfaction with excellent quality. In 2023, NAURA's operating income hit a new high of 22.08 billion yuan, maintaining rapid growth for five consecutive years. The achievement of this performance is inseparable from the company's consistent adherence to the customer-oriented continuous innovation concept, efficient operation and management capabilities, and continuously optimized product and service capabilities. This is also the corporate development concept advocated by the "TOP100 New Entity Enterprises" list-driven by innovation to achieve sustainable and healthy development of the real economy.
Looking ahead, NAURA will continue to deepen the integration of digital technology and the real economy, and contribute to the innovative development of China's semiconductor industry. At the same time, the company will uphold the corporate mission of "promoting industrial progress and creating unlimited possibilities", and work closely with upstream and downstream companies in the industrial chain in a more open manner to jointly promote the healthy development of China's semiconductor industry.
"2023 New Entity Enterprises TOP100" is an authoritative ranking list released by the China Enterprise Evaluation Association, which has been held for three consecutive years. In this year's selection, the jury selected the best from more than 17,000 enterprises across the country and selected the 100 entity enterprises with the strongest comprehensive strength. The award comprehensively measures the performance of enterprises in the real economy, technological innovation, and digital empowerment of the industrial chain from multiple evaluation dimensions such as enterprise entity, technology, and ecological inclusiveness.
NAURA has been deeply involved in the field of basic semiconductor products, insisting on innovation-driven development, deeply integrating digital technology into production and services, and winning customer satisfaction with excellent quality. In 2023, NAURA's operating income hit a new high of 22.08 billion yuan, maintaining rapid growth for five consecutive years. The achievement of this performance is inseparable from the company's consistent adherence to the customer-oriented continuous innovation concept, efficient operation and management capabilities, and continuously optimized product and service capabilities. This is also the corporate development concept advocated by the "TOP100 New Entity Enterprises" list-driven by innovation to achieve sustainable and healthy development of the real economy.
Looking ahead, NAURA will continue to deepen the integration of digital technology and the real economy, and contribute to the innovative development of China's semiconductor industry. At the same time, the company will uphold the corporate mission of "promoting industrial progress and creating unlimited possibilities", and work closely with upstream and downstream companies in the industrial chain in a more open manner to jointly promote the healthy development of China's semiconductor industry.
The Institute of Microelectronics has made new progress in the development of all-spin neuromorphic computing hardware and circuit implementation
Neuromorphic computing has attracted widespread attention worldwide due to its huge application potential in AI and big data analysis. In order to overcome the limitations of traditional CMOS transistor technology, researchers have long been committed to exploring hardware implementation solutions based on new non-volatile memories (NVMs) and spintronic devices. At present, various types of NVMs have been used to implement various operations in neural networks and show broad prospects. Among them, spintronic devices are considered to be one of the ideal candidates for simulating synaptic and neuron functions due to their rich and controllable spin dynamics.
Recently, the team led by Academician Liu Ming and Researcher Xing Guozhong from the Key Laboratory of the Institute of Microelectronics successfully developed a magnetic domain wall tunnel junction (DW-MTJ) device based on the dynamic characteristics of the fully electrically controlled magnetic domain wall (DW), and realized the functions of linear weight update and nonlinear activation function. For the first time, the team experimentally demonstrated and verified that the DW-MTJ integrated device can realize all-spin artificial synapse and neuron functions, laying the foundation for highly scalable integrated neuromorphic circuits. The team used the synergistic effect of spin-orbit coupling and interfacial Dzyaloshinskii-Moriya interaction to realize programmable multi-state synaptic devices with high reliability. First-principles calculations show that the controllable compression of 5D and 3D atomic spacing enhances the Dzyaloshinskii-Moriya antisymmetric interaction, thereby stabilizing the pinning of the magnetic domain wall. The experimental results verify the effectiveness of this mechanism. Based on the efficient driving and reliable pinning of the magnetic domain wall by the spin-orbit moment, the team demonstrated a spin neuron with a sigmoid-type activation function, with a maximum operating frequency of 20 MHz and an energy consumption of only 508 fJ/spike. The compact Sigmoid neuron circuit design achieves low-power operation. This work fully demonstrates the great potential of DW-MTJ spintronic devices in neuromorphic computing applications and provides a new path for hardware development to achieve energy-efficient, highly reliable and scalable neural network architectures.
Recently, the team led by Academician Liu Ming and Researcher Xing Guozhong from the Key Laboratory of the Institute of Microelectronics successfully developed a magnetic domain wall tunnel junction (DW-MTJ) device based on the dynamic characteristics of the fully electrically controlled magnetic domain wall (DW), and realized the functions of linear weight update and nonlinear activation function. For the first time, the team experimentally demonstrated and verified that the DW-MTJ integrated device can realize all-spin artificial synapse and neuron functions, laying the foundation for highly scalable integrated neuromorphic circuits. The team used the synergistic effect of spin-orbit coupling and interfacial Dzyaloshinskii-Moriya interaction to realize programmable multi-state synaptic devices with high reliability. First-principles calculations show that the controllable compression of 5D and 3D atomic spacing enhances the Dzyaloshinskii-Moriya antisymmetric interaction, thereby stabilizing the pinning of the magnetic domain wall. The experimental results verify the effectiveness of this mechanism. Based on the efficient driving and reliable pinning of the magnetic domain wall by the spin-orbit moment, the team demonstrated a spin neuron with a sigmoid-type activation function, with a maximum operating frequency of 20 MHz and an energy consumption of only 508 fJ/spike. The compact Sigmoid neuron circuit design achieves low-power operation. This work fully demonstrates the great potential of DW-MTJ spintronic devices in neuromorphic computing applications and provides a new path for hardware development to achieve energy-efficient, highly reliable and scalable neural network architectures.
The last sentence there, "that distance of closing the gap pertaining to Europe and America, is really not that far off."
If they were referring to DUVi, then that is far off.
So have to assume they talking about the EUV machine, and those tools from LAM and AMAT and the like.
It is 2024 halfway through. Damn, that is kind of fast.
SSA800A 28NM DUVI is old news bro, what interest me is the mythical 22nm SSA900A and the 7nm domestic line. I think he maybe referring to this subject as they find a domestic substitution solution. Just look at the timeline nobody talks about 14nm anymore, in 2021 it was the hottest topic. The localization effort lag 1 generation behind SMIC Shanghai FAB which use western equipment, having received ASML NXT 2050i or even 2100i, at least they have a reference point to where the localization development will go as the sanction was enforced.The last sentence there, "that distance of closing the gap pertaining to Europe and America, is really not that far off."
If they were referring to DUVi, then that is far off.
So have to assume they talking about the EUV machine, and those tools from LAM and AMAT and the like.
It is 2024 halfway through. Damn, that is kind of fast.
Now people are talking about N+4 3nm chip and it may take 2 years to realized its full domestic line after its introduction in 2026.
My projection and its timeline
2021
SMIC is already producing N+1 8nm chip while China complete the domestic 14nm line
2022
N+2 7nm chip limit production run
2023
N+2 7nm is in full production and we heard of N+3 5nm development.
2024
Domestic 7nm line complete and late production of N+3 5nm chip.
2025
N+4 3nm chip finished its development and is in production in limited amount
2026
Full scale production of N+3 and the introduction of domestic 5nm line.
Aug 26, 2021 — China is expected to achieve full-scale mass production of 14nm chips by localising the entire production line and supply chain as early as ...
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The overwhelming assumption is SMIC producing 14nm or anything below in China.
But it's almost mutually exclusively. If SMIC maintains 14nm/12nm line that will take away 7nm, 5nm production capacity. If 7nm line is maintained, it will take away 14nm/12nm, 5nm production.
Assuming SMIC has limited capacity, it cant produce 14/12nm, 7nm, 5nm all simulatenously unless SMIC has expanded to multiple lines or there are other players are doing the production,
Do you know if SMIC has 14nm/12nm, 7nm and 5nm lines are setup and running ALL simulatenously? They are all finfet tech and use the same resources.
Assuming SN1 is setup for 7nm for huawei. Where's the fab for 12nm for Loongson? SN2? where's the fab for 5nm?
You can't have SN1 running at 7nm yesterday and 12nm today and 5nm tommorrow.
Nanjing TSMC line only setup do 16nm, it can't do anything else.
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