Chinese semiconductor thread II
- Thread starter vincent
- Start date
CD-SEM domestic companies and progress.
1. Dongfang Jingyuan Dongfang Jingyuan Microelectronics Technology (Beijing) Co., Ltd. was established in 2014 and is headquartered in Yizhuang Economic and Technological Development Zone, Beijing. It is an enterprise focusing on integrated circuit yield management. The 12-inch and 6/8-inch key dimension measurement equipment CD-SEM launched by Dongfang Jingyuan has been in mass production for a long time, and can support a variety of measurement scenarios such as Line/Space, Hole/Elliptic, LER/LWR, etc. to meet the needs of Various imaging needs. It is understood that the company's CD-SEM has previously been delivered to SMIC and Yandong Micro. At present, the company's latest CD-SEM models are SEpA-c300 and SEpA-c400, which are respectively targeted at 8-inch and 12-inch wafer products. On September 5, 2023, the China Securities Regulatory Commission released a report on Oriental Crystal Microelectronics Technology (Beijing) Co., Ltd.'s initial public offering of shares and guidance on listing on the Science and Technology Innovation Board. The counseling agency is CITIC Securities Co., Ltd.
2. Shanghai Precision Testing Shanghai Jingce Semiconductor Technology Co., Ltd. was established in July 2018. It is mainly engaged in the research and development, production and sales of semiconductor quality testing equipment. It also develops some testing equipment in the display and new energy fields. In 2021, Shanghai Jingce completed the order delivery of the first CD-SEM project. At the end of December 2022, Jingce Semiconductor announced that the first CD-SEM equipment (eMetric) had been successfully shipped to customers in South China. eMetric is a newly independently developed electron beam wafer critical dimension measurement equipment (CD-SEM) developed by the local R&D team of Shanghai Jingce Semiconductor to break the monopoly of foreign companies and rely on its own strength. It has all independent intellectual property rights of core components. This equipment can achieve high aspect ratio feature measurement and overlay measurement, and can meet the completely different measurement needs of 6/8/12-inch wafers from a small field of view of microns to a large field of view of hundreds of microns.
3. Suzhou Silicon Vision Suzhou Sishi Technology Co., Ltd. was established in June 2021. It focuses on the research and development, production and service of high-end semiconductor wafer quality inspection equipment. It is committed to independently developing domestic electron beam imaging quality inspection equipment with completely independent intellectual property rights and meeting industry needs. . In just over two years, Silicon Vision Technology has launched CDSEM and other types of equipment, and has won many honors as Suzhou's Gusu Leading Talent, Xiangcheng District Unicorn Enterprise, and Xiangcheng District Key Entrepreneurship Team. Among them, CDSEM (critical dimension measurement equipment) mainly monitors the pattern size formed after the photolithography process during the IC manufacturing process by sampling and measuring critical dimensions to ensure yield. This equipment benchmarks against mainstream production products in the industry and develops unique charge control methods and dynamic compensation methods for position deviation. It can meet market requirements in terms of resolution, field of view, sampling frequency, positioning accuracy and throughput rate. On December 14, 2023, Suzhou Silicon Vision Technology Co., Ltd.’s first critical dimension measurement equipment (CDSEM) was rolled out. Suzhou Silicon Vision Technology stated that the equipment was independently developed by Suzhou Silicon Vision Technology. The most important electronic optical system has its own core technology and is completely free of imports. Its main performance indicators are comparable to similar products in the United States and abroad, adding a new force to domestic substitution.
4. Qingtian Hengren Qingtian Hengren was founded in 2022. It is a CD-SEM equipment company founded by veterans in the CD-SEM field. The R&D center is located in Fengtai District, Beijing. The company mainly focuses on the R&D, design and sales of CD-SEM equipment. The core team is in CD -Has rich experience in R&D, design and operation management in the SEM field. It is reported that the development of CD-SEM equipment is difficult and the technical threshold is high. After many years of in-depth research on underlying physics, mathematics, materials, software, processes, etc., the Qingtian Hengren R&D team spent nearly two years developing Alibaba Cloud servers. We ran data on simulated CD-SEM equipment and finally made breakthrough progress. In August this year, Qingtian Hengren completed the Pre-A round of financing, which was jointly invested by Fangfu Venture Capital and Mingde Investment; the angel round financing institution was Beijing Zhongguancun Collaborative Innovation Fund. This round of financing will be mainly used for the research and development of CD-SEM equipment, with the goal of developing and producing CD-SEM products that can completely replace the Hitachi CG5000. Overall, leading international companies are in a dominant position in technology and market, and it is difficult to substitute domestic products. Domestic companies generally set up R&D-related equipment relatively late, and their talent teams are mostly composed of technical personnel who have returned from overseas. They do not ship many products, and most of them are still in the early stages of research and development. However, the dawn of domestic disruption is beginning to appear.
Q1, 2024 Revenue further increased 125.27% year-on-year..
so far All major domestic semiconductor equipment companies saw not less than 100% year-on-year growth in Q1, 2024 .. unreal
with this speed, Chinese companies will clean sweep home within few years..
these days, crystal growth (jingsheng) is probably best known for their SiC substrate/epitaxy furnace.
Pretty impressive to see their R&D efforts here
Waveguide-integrated twisted bilayer graphene photodetectors
Abstract
Graphene photodetectors have exhibited high bandwidth and capability of being integrated with silicon photonics (SiPh), holding promise for future optical communication devices. However, they usually suffer from a low photoresponsivity due to weak optical absorption. In this work, we have implemented SiPh-integrated twisted bilayer graphene (tBLG) detectors and reported a responsivity of 0.65 A W–1 for telecom wavelength 1,550 nm. The high responsivity enables a 3-dB bandwidth of >65 GHz and a high data stream rate of 50 Gbit s–1. Such high responsivity is attributed to the enhanced optical absorption, which is facilitated by van Hove singularities in the band structure of high-mobility tBLG with 4.1o twist angle. The uniform performance of the fabricated photodetector arrays demonstrates a fascinating prospect of large-area tBLG as a material candidate for heterogeneous integration with SiPh.Hah - no way he is a Washington insider - he is way too reasonable. He even he admits he bought his glasses in China - pretty sure that would make you excluded on natsec grounds ...
Xinhuazhang Technology Co., Ltd. (X-EPIC) has recently obtained a patent titled "Method, electronic device and storage medium for positioning verification errors". The authorization announcement number is CN115510782B, and the authorization announcement date is April 2024. on August 26, 2022, and the application date is August 31, 2022.
The present application provides a method for locating verification errors in a logical system design, including: receiving multiple verification errors generated by the logical system design in a verification environment, where the multiple verification errors include a plurality of first verification errors and a third verification error. 2. Verification errors; among the plurality of verification errors, determining a mapping relationship between a plurality of first verification errors and a plurality of first error positions corresponding to the plurality of first verification errors; based on the logical system design , the verification environment and the mapping relationship generate the error location model; and use the error location model to determine the second error location of the second verification error.
The present application provides a method for locating verification errors in a logical system design, including: receiving multiple verification errors generated by the logical system design in a verification environment, where the multiple verification errors include a plurality of first verification errors and a third verification error. 2. Verification errors; among the plurality of verification errors, determining a mapping relationship between a plurality of first verification errors and a plurality of first error positions corresponding to the plurality of first verification errors; based on the logical system design , the verification environment and the mapping relationship generate the error location model; and use the error location model to determine the second error location of the second verification error.