Chinese semiconductor thread II

olalavn

Senior Member
Registered Member
The clustering performance of HW Ascend 920 is higher than NVIDIA GH200. With the same 16,384 cards, performance can reach 16EFLOPS with only 15 MW, while NVIDIA GH200 requires 19 MW.

I'm surprised about Huawei's Biren, it's being Sanctioned in terms of production...



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ansy1968

Brigadier
Registered Member
you guys seriously think. China will stop if lets suppose USA lift off all the sanctions ... absolutely no chance. ship has sailed.

strict orders from above, no matter what, China has to achieve self-sufficiency in all core technologies. and we are very close to our goal.
Bro I think the reason why SMEE will not announce the official launching of SSA 800A Duvi, They want the American to pursue more sanction to hasten its semiconductor development, in detrimental for ASML.
 

ansy1968

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Registered Member
3 months ago, I posted that Huawei is building another IC factory that will be completed in 2026...
Using SSA800A Duvi or an EUVL or both? the timeline for the completion of the FAB coincide with the possible mass production of a commercial EUVL.
 

european_guy

Junior Member
Registered Member

Thanks for translation.

To me the most interesting part is the blue one at the top

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Harbin Institute won the prize for their ultra precise wafer stage with top speed (translates in productivity) and top positioning error of just 0.1nm(!!!!) although not clear what "dynamic calibration" actually means. I don't think it is overlay accuracy.

They say they closed the gap with ASML in wafer stage positioning, this is a big claim!

Wafer stage positioning is a key enabler for 7/5nm nodes with a DUVi machine.
 

tphuang

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HIT post basically confirms their progress not in SMEE's 14/28nm DUVi projects, but also CIOMP's EUV work, production of 5/7nm Kirin chips, CETC SMEs and CAS SMEs. Basically, it got awarded for being part of most of the major semi projects from past 2/3 years

The ascend 920 post is pretty amazing too. I'm dubious of some of the claims in their like the chip-to-chip interconnect.

but i would not be surprised if its computation power is 1000 PFLOPS FP16. one of the well known issues with Ascend-910B is the chip to chip performance

Even aside from the headline numbers, it suggest Ascend-920 consumes less power, has better computation across the board than H100
Has better chiplet technology, more HBM memory

I find the HIT post to be more believable than Ascend post
 
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tokenanalyst

Brigadier
Registered Member
Thanks for translation.

To me the most interesting part is the blue one at the top

View attachment 127707

Harbin Institute won the prize for their ultra precise wafer stage with top speed (translates in productivity) and top positioning error of just 0.1nm(!!!!) although not clear what "dynamic calibration" actually means. I don't think it is overlay accuracy.

They say they closed the gap with ASML in wafer stage positioning, this is a big claim!

Wafer stage positioning is a key enabler for 7/5nm nodes with a DUVi machine.
MMO and SMO will depend more on the holistic solution that SMEE and others will provide.
That will depend on:

-The grating and interforemeter positioning sensors accuracy in both in the wafer stage and in the reticle stage.

-Overlay Mark Measurement Alignment accuracy:

-Metrology tools:
Overlay Metrology tools.
1712414580997.png

CDSEM tools
1712414718770.png

Inspection tools:
AEI and ADI

1712414830227.png

Computational lithography software.
 
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