Chinese semiconductor industry

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ougoah

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EU invest hugely to pursue 2nm to close the gap with the leader, even though they dont pursue to be the leader, and their smartphone vendor like Nokia is not at the forefront yet like Samsung-Apple-Xiaomi-Huawei etc. They dont want to have these gap anymore.

This is their plan in 2020:
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China will fall behind US, Europe, Taiwan and Korea if China is reluctant to invest in the forefront technology.

The difference between China and the EU in their attempts to "close the gap" with South Korea and Taiwan in holding every aspect of the supply chain and ecosystem of technologies is that EU's motivations are half assed political and industrial. China's motivations are do or die. China is not only more willing to invest in both silicon based fab technology (of which it is far ahead of EU in terms of comprehensive ecosystem), it is also more willing to put more state and market backed incentive models to achieve this. It uses both engines. Can we assume the Chinese system may have certain inefficiencies compared to western ones? perhaps but they're certainly not good assumptions anymore as China has proven it doesn't suffer from "communist industrial inefficiencies" even if on principle they may exist. That is also to ignore certain strengths of making use of state backed projects - high risk, often low reward project types being typical ones that thrive.

ASML makes one tool that others need for 7nm and lower fab. It's a tool. It's not the ecosystem. Netherlands cannot do what South Korea and Taiwan do. At the moment, not even China and the US can do it. Etching tools, academic institutions, lens etc, China has them and has them in spades. EUVL may be the major obstacle for silicon but I only see China and the US going after alternatives/ different principles of physics as alternative technologies to silicon.

EU being confident in this is like Ozito being confident they can build a submarine just because submarine builders happen to use one of their tools. China invests more in this than EU simply because it needs to more than the EU. The EU wants to narrow or empty the gap because it's nice to have. China needs to because it won't have as many competitive players as it did in many fields if it doesn't. Sure Chinese market can support it somewhat and China doesn't need 7nm for military or even vital equipment. This is all "nice to have" stuff but for China's ambition of becoming totally self sufficient in this nice to have industry, it is an absolute must. You can rest assured China is not reluctant to invest in this. Even with diminishing returns on investment, it appears to still struggle on it despite everyone knowing silicon isn't only going to hit a wall within 10 years but the economic returns for investing in getting to 2nm is going to be exponentially reduced.
 

antonius123

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yeapp thats the plan, but currently they also stuck with 14nm technology, even worse as GF is American company. I am talking about current not the future.

But I totally agree that China should invest in the forefront technology, .. which the do seriously


Yeap; even Japan want to close the gap too.


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So I dont see any reason why China should not close the gap; China has Xiaomi, Oppo, Vivo, Huawei that could rule the high end smartphone market compared to Japan that has none at the moment. In the meantime China has a lot of money to do so.
 

FairAndUnbiased

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Registered Member
The difference between China and the EU in their attempts to "close the gap" with South Korea and Taiwan in holding every aspect of the supply chain and ecosystem of technologies is that EU's motivations are half assed political and industrial. China's motivations are do or die. China is not only more willing to invest in both silicon based fab technology (of which it is far ahead of EU in terms of comprehensive ecosystem), it is also more willing to put more state and market backed incentive models to achieve this. It uses both engines. Can we assume the Chinese system may have certain inefficiencies compared to western ones? perhaps but they're certainly not good assumptions anymore as China has proven it doesn't suffer from "communist industrial inefficiencies" even if on principle they may exist. That is also to ignore certain strengths of making use of state backed projects - high risk, often low reward project types being typical ones that thrive.

ASML makes one tool that others need for 7nm and lower fab. It's a tool. It's not the ecosystem. Netherlands cannot do what South Korea and Taiwan do. At the moment, not even China and the US can do it. Etching tools, academic institutions, lens etc, China has them and has them in spades. EUVL may be the major obstacle for silicon but I only see China and the US going after alternatives/ different principles of physics as alternative technologies to silicon.

EU being confident in this is like Ozito being confident they can build a submarine just because submarine builders happen to use one of their tools. China invests more in this than EU simply because it needs to more than the EU. The EU wants to narrow or empty the gap because it's nice to have. China needs to because it won't have as many competitive players as it did in many fields if it doesn't. Sure Chinese market can support it somewhat and China doesn't need 7nm for military or even vital equipment. This is all "nice to have" stuff but for China's ambition of becoming totally self sufficient in this nice to have industry, it is an absolute must. You can rest assured China is not reluctant to invest in this. Even with diminishing returns on investment, it appears to still struggle on it despite everyone knowing silicon isn't only going to hit a wall within 10 years but the economic returns for investing in getting to 2nm is going to be exponentially reduced.
agree, if you go by the logic that if you have ASML you have the entire chipbuilding industry then UK's Queen Elizabeth class carriers are actually Chinese carriers, since the critical tool - the 10k ton crane - is from Zhenhua.
 

ansy1968

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Registered Member
agree, if you go by the logic that if you have ASML you have the entire chipbuilding industry then UK's Queen Elizabeth class carriers are actually Chinese carriers, since the critical tool - the 10k ton crane - is from Zhenhua.
@FairAndUnbiased bro since you work in the industry, is there any new techniques or innovative process aside from 3D stacking to be competitive with those using EUVL equipment? If there is will it be viable cost wise cause waiting and standing still is not an option.
 

ougoah

Brigadier
Registered Member
agree, if you go by the logic that if you have ASML you have the entire chipbuilding industry then UK's Queen Elizabeth class carriers are actually Chinese carriers, since the critical tool - the 10k ton crane - is from Zhenhua.

Yeah there are so many duds online who claim China lost semiconductor war because it hasn't got 7nm accomplished yet.

After learning the entire picture oh how the situation has been like for the last 20 years and developed until this moment (of publicly available information). China has never been that behind in semiconductor fab and has been leading semiconductor design for years. With the fab side of the problem, China is literally the third ranked player behind Taiwan and South Korea, well in terms of having all the necessary technologies and scientific knowledge involved in fab. This is impressive for China for not having the economic reasons to pursue comprehensive mastery.

The economic and political motivations for this pursuit has only been given to China since 2019. The EU hasn't got those motivations to the same level, nor do the Japanese or Americans. The Americans are funding alternatives and control the other major players through political power and signed agreements such as the Wassenaar Arrangement and other forms of soft power leverage they have on various suppliers of various tools and technologies. The real race is in finding alternatives. With some of their efforts mentioned in video below.


This could explain why the US is in no hurry to be like South Korea or Taiwan.
 

FairAndUnbiased

Brigadier
Registered Member
@FairAndUnbiased bro since you work in the industry, is there any new techniques or innovative process aside from 3D stacking to be competitive with those using EUVL equipment? If there is will it be viable cost wise cause waiting and standing still is not an option.
My work is not so much on design or the raw materials, so my understanding is more limited there especially for logic. There's lots of functional semiconductor materials out there like SiC or GaN, but those aren't for logic.

I think people are out of ideas for further logic development other than 3D architectures. alot of the ideas from the mid 2000's and early 2010's have not worked out:

1. EUV - rollout and adoption has been far slower than expected, most fabs except TSMC, Intel and Samsung abandoned them including former industry leaders like GloFo

2. 450 mm wafers - fabs don't want them due to vastly higher expense than 300 mm wafers

3. Alternative materials - none have the flexibility and cost effectiveness of Si for logic devices which has unique properties highly beneficial to semiconductor processes i.e. a stable native oxide. They're only used for power and RF.

4. Photonic computing - requires exotic materials beyond silicon and light is not as good as electricity for very important storage functions - an electronic chip has integrated storage, a photonic chip doesn't. They're not used for logic, only for communications.

5. Advanced gate geometry - other than finFET introduction in 2015 the gate geometry doesn't seem to have changed much for decades. There's potential for nanowire gates or gate all around to offer a boost at the 3-5 nm node, but then that's about it. It's a one-time improvement, not a sustained improvement.

Of these, I'd say that advanced gate geometry and EUV are the ones that would have the most success and even there it's limited.

One idea that's not been explored much is advanced thermal management so the useless silicon becomes alive, but even that is more to do with packaging than with lithography level considerations.
 

antonius123

Junior Member
Registered Member
My work is not so much on design or the raw materials, so my understanding is more limited there especially for logic. There's lots of functional semiconductor materials out there like SiC or GaN, but those aren't for logic.

I think people are out of ideas for further logic development other than 3D architectures. alot of the ideas from the mid 2000's and early 2010's have not worked out:

1. EUV - rollout and adoption has been far slower than expected, most fabs except TSMC, Intel and Samsung abandoned them including former industry leaders like GloFo

2. 450 mm wafers - fabs don't want them due to vastly higher expense than 300 mm wafers

3. Alternative materials - none have the flexibility and cost effectiveness of Si for logic devices which has unique properties highly beneficial to semiconductor processes i.e. a stable native oxide. They're only used for power and RF.

4. Photonic computing - requires exotic materials beyond silicon and light is not as good as electricity for very important storage functions - an electronic chip has integrated storage, a photonic chip doesn't. They're not used for logic, only for communications.

5. Advanced gate geometry - other than finFET introduction in 2015 the gate geometry doesn't seem to have changed much for decades. There's potential for nanowire gates or gate all around to offer a boost at the 3-5 nm node, but then that's about it. It's a one-time improvement, not a sustained improvement.

Of these, I'd say that advanced gate geometry and EUV are the ones that would have the most success and even there it's limited.

One idea that's not been explored much is advanced thermal management so the useless silicon becomes alive, but even that is more to do with packaging than with lithography level considerations.


How about graphene chip?
 

Tyler

Captain
Registered Member
Huawei should stay in the smartphone market by dominating the low and mid end market until the technology for the high end chips are sorted. 7nm in 2023 is more than good enough to dominate the low and mid tier smartphone market. Continuing to get revenue from the smartphone division is the most important thing. Harmony OS can also be further developed in the low and mid end market. Many people around the world can’t afford high end smartphones.

Also the upgrade cycle of new smartphones is getting longer because many people don’t see the point of upgrading to a new smartphone for a small increase in performance, it’s not worth the money. I don’t know of anyone that buys a new smartphone every year. People wait around 3 years to upgrade until they see a noticeable difference in performance/technology etc.
It may sound extreme, but China should just ban the manufacturing of Apple products in China, unless all sanctions on all Chinese technology companies are lifted. This would send Apple into disarray, the US stock market into a shock, while the foxconn factories in India are not even running yet. This would buy some extra time of catching up, while the enemies are scrambling.
 

FairAndUnbiased

Brigadier
Registered Member
How about graphene chip?
Let's see:

No native bandgap so you can't switch it electronically in the native state, needs to be doped to get a bandgap

No native oxide so to build insulators you have to introduce a new insulating film precursor (expensive and risky) rather than just introduce water or oxygen (essentially free)

No self supporting wafer so you need to deposit on another substrate.

But if there is lattice mismatch between substrate and graphene the graphene layer breaks up into tiny domains

If you deposit on top of graphene, you also need good adhesion or crystal match, but graphene already has saturated in plane bonds so nothing sticks to it either.

So basically, it can't be a transistor natively. But even if it could, you can't insulate it easily because no native oxide. Even if you could insulate it with a deposited insulator, does the insulating later actually stick to graphene? And does the graphene stick to it's substrate?

What you get in return is higher electron mobility and therm conductivity. Ok, we already have GaAs with higher electron mobility and actual prototype devices made from them but they were proven to be too expensive since they had no native oxide.

Useless for electronic logic. Very useful for other things like heating elements, RF, chemical sensors, etc.
 

BoraTas

Major
Registered Member
Let's see:

No native bandgap so you can't switch it electronically in the native state, needs to be doped to get a bandgap

No native oxide so to build insulators you have to introduce a new insulating film precursor (expensive and risky) rather than just introduce water or oxygen (essentially free)

No self supporting wafer so you need to deposit on another substrate.

But if there is lattice mismatch between substrate and graphene the graphene layer breaks up into tiny domains

If you deposit on top of graphene, you also need good adhesion or crystal match, but graphene already has saturated in plane bonds so nothing sticks to it either.

So basically, it can't be a transistor natively. But even if it could, you can't insulate it easily because no native oxide. Even if you could insulate it with a deposited insulator, does the insulating later actually stick to graphene? And does the graphene stick to it's substrate?

What you get in return is higher electron mobility and therm conductivity. Ok, we already have GaAs with higher electron mobility and actual prototype devices made from them but they were proven to be too expensive since they had no native oxide.

Useless for electronic logic. Very useful for other things like heating elements, RF, chemical sensors, etc.
Spot on. Graphene chips are mostly a sci-fi feature. One of the greatest problems is you can not stack multiple graphene layers. It becomes plain graphite if you do that. We don't even have a single-atom-thick transistor design. What's worse is we don't even know how to design a single atom thick transistor because of quantum tunneling.
 
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