The Department of Automation and the Department of Electronics collaborate to develop ultra-high-speed optoelectronic computing chips
Tsinghua News Network, October 30. In 1965, Gordon Moore, one of the founders of Intel, proposed "Moore's Law" that has influenced the chip industry for more than half a century: it predicts that the number of transistors that an integrated circuit can accommodate will increase every two years or so. Double. The field of semiconductors has prospered and developed under Moore's Law for decades, and "chips" have become an important engine for mankind to enter the intelligent era. However, as transistor size approaches physical limits, Moore's Law has slowed down or even faced failure in the past decade. How to build a new generation of computing architecture and establish a "new" order for chips in the artificial intelligence era has become a frontier hot topic of great concern to the international community.
In response to this problem, Academician Dai Qionghai and Assistant Professor Wu Jiamin of the Department of Automation of Tsinghua University, and Associate Professor Fang Lu and Associate Researcher Qiao Fei of the Department of Electronic Engineering jointly tackled the problem and proposed a new computing architecture that "breaks away" from Moore's Law: optoelectronic simulation chips, computing power Reaching more than 3,000 times that of current high-performance commercial chips. The relevant results are titled "All-analog photo-electronic chip for high-speed vision tasks
" and were published in the journal Nature in the form of a long article . If the running time of a vehicle is used to compare the information flow calculation time in a chip, then the emergence of this chip is equivalent to shortening the 8-hour running time of the Beijing-Guangzhou High-speed Railway to 8 seconds.
In this small chip, the Tsinghua University research team creatively proposed a computing framework for deep integration of optoelectronics. Starting from the most essential physical principles, it combines optical computing based on electromagnetic wave space propagation and pure analog electronic computing based on Kirchhoff's laws, "breaking away" from the physics that restricts data conversion speed, accuracy and power consumption in traditional chip architectures. The bottleneck is to break through three international problems of large-scale computing unit integration, high-efficiency nonlinearity, and high-speed optical and electrical interfaces on one chip.
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Optoelectronic chip
According to actual measurement performance, the system-level computing power of the optoelectronic fusion chip is thousands of times higher than that of the existing high-performance chip architecture. However, such amazing computing power is only one of the many advantages of this chip.
In the intelligent vision tasks and traffic scene calculations demonstrated by the R&D team, the system-level energy efficiency (number of operations that can be performed per unit energy) of the optoelectronic fusion chip was measured to reach 74.8 Peta-OPS/W, which is more than 4 million peta-OPS/W of existing high-performance chips. times. To put it figuratively, the amount of electricity that originally powered an existing chip to work for one hour can last it more than 500 years.
A key factor currently limiting the limits of chip integration is the heat dissipation problem caused by excessive density. Optoelectronic fusion chips operating at ultra-low power consumption will help greatly improve chip heating problems and bring all-round breakthroughs to future chip designs.
Furthermore, the minimum processing line width of the optical part of the chip is only one hundred nanometers, while the circuit part only uses 180nm CMOS process, which has achieved performance improvements of several orders of magnitude compared to high-performance chips made using the 7nm process. At the same time, the materials used are simple and easy to obtain, and the cost is only a few tenths of the latter.
