Chinese semiconductor industry

tokenanalyst said:

Well some parts of the process can be done using single patterning but overall multi-patterning has been the standard since the 32nm planar process, even with EUV, multi-patterning will be still a requirement because how the light behave.

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You can see in this table after 70nm+ TSMC use multi-patterning, my guess is that is easier to deal with overlay metrology issues than to deal light issues.

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oh, my bad, physical resolution here is meaningful in comparison to gate pitch rather than the common node we talk about

Interesting stuff here. But this brings up another question for me. So N7 uses 40nm (or 42nm in case of SMIC N+2), so it makes sense that is below practical physical resolution limit of Arfi scanner. I'd imagine for 14nm process, the gate pitch would be between 40 and 76nm, likely above 45nm, why would that still require multi-patterning?

tphuang said:

oh, my bad, physical resolution here is meaningful in comparison to gate pitch rather than the common node we talk about

Interesting stuff here. But this brings up another question for me. So N7 uses 40nm (or 42nm in case of SMIC N+2), so it makes sense that is below practical physical resolution limit of Arfi scanner. I'd imagine for 14nm process, the gate pitch would be between 40 and 76nm, likely above 45nm, why would that still require multi-patterning?

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My guess once you are reaching the resolution limit on an optical system, in the case of ASML immersion scanners, 40nm, everything gets more complicated to get good results, there are techniques phase shift masks, OPC and so on but still. I think multi Patterning allow you to stay away from the resolution limit and still get smaller denser features, basically for cheap, otherwise it will require costlier mask solutions. Even with EUV single pattering is a problem the closer you get to the resolution limit because random effects so fabs may still want to use multi patterning to stay away from the resolution limit.

tphuang said:

In this case, if physical resolution is closer to 40nm, then how are fabs able to do 28nm process with single exposure of Arfi scanner? At least that's what I've been led to believe with what we've discussed so far on this thread.

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Due to CA (chemically amplified) photoresist with very high non-linear contrast response. This is the secret to shrink resolution well below the light source's one.

Here is very well explained how it works:


But if we limit the discussion to litho machine alone, as others already explained, the main difference between an entry level immersion machine for 28nm node and the top ones is the position accuracy so to allow very aggressive multiple exposures on even smaller components. We are talking of at 296 wafer per hour for the ASML NXT:2050i.

european_guy said:

Due to CA (chemically amplified) photoresist with very high non-linear contrast response. This is the secret to shrink resolution well below the light source's one.

Here is very well explained how it works:

But if we limit the discussion to litho machine alone, as others already explained, the main difference between an entry level immersion machine for 28nm node and the top ones is the position accuracy so to allow very aggressive multiple exposures on even smaller components. We are talking of

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at 296 wafer per hour for the ASML NXT:2050i.

Click to expand...

Yeah that there has been a significant effort in overlay metrology in China.

tokenanalyst said:

This is the key technology for etching smaller features with multipatterning

Development and challenges of key lithography alignment technologies​

Summary
With the rapid development of the semiconductor industry, the feature dimensions of photolithography processes in integrated circuit manufacturing are shrinking to the extreme, and the requirements for overlay accuracy are becoming increasingly stringent. Based on the core technology that affects overlay accuracy, namely alignment technology, this article conducts an inductive analysis of the design of precision measurement sensing systems and the design of alignment marks for micro-nano measurement objects in this technology. It is used by top international technology companies in the industry. The technological developments of the above are sorted out, and the role they play in promoting the evolution of the alignment measurement technology path is introduced in detail. At the same time, the latest research results of relevant domestic technical teams in this direction are also summarized. Based on this, the improvement direction and optimization ideas of photolithography alignment technology for more advanced process nodes are further discussed, thereby providing important technical reference for obtaining higher-precision overlay performance.

Progress
Besides the above international giants, we also investigate the domestic teams who are actively exploring alignment improvements. Shanghai Micro Electronics Equipment (Group) Co., Ltd. (SMEE) proposed multi-grating marks with large and small periods for coarse and fine alignment.
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Institute of Optoelectronics Technology, Chinese Academy of Sciences (IOE) conducted an overlapped grating equivalent comparing with the transmission type.
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Harbin Institute of Technology (HIT) put forward a multi-channel and multi-order grating interferometry for stable position measurement and alignment.
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Shanghai Institute of Optics and Fine Mechanics, Chinese Academy of Sciences (SIOM) proposed Moiré fringes to enhance the detection sensitivity.
View attachment 119660
Image processing methods were employed to avoid motion errors. Institute of Microelectronics,Chinese Academy of Sciences (IME) proposed a mark design method that makes zero and even order diffraction automatically miss while the diffraction efficiency of higher odd orders was enhanced. The team also provided a depolarizer-compensation method based on an optimized reflective film layer. Additionally , they investigated the effect of mark asymmetry and proposed a weighted optimization for different diffraction orders.

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european_guy said:

Due to CA (chemically amplified) photoresist with very high non-linear contrast response. This is the secret to shrink resolution well below the light source's one.

Here is very well explained how it works:

But if we limit the discussion to litho machine alone, as others already explained, the main difference between an entry level immersion machine for 28nm node and the top ones is the position accuracy so to allow very aggressive multiple exposures on even smaller components. We are talking of

Please, Log in or Register to view URLs content!

at 296 wafer per hour for the ASML NXT:2050i.

Click to expand...

This is why the Harbin Institute's new laser interferometer is so important. It's going to enormous downstream effects on lithography machines' workbenches and China's metrology sector in general. It's an indispensable piece of technology.

Monthly tracking of the trend of domestic substitution of semiconductor equipment: August production line bidding continued to grow month-on-month, and domestically produced bids won steady breakthroughs​

　　There were a total of 500 tenders in August, mainly from Huahong, Jita, and Yuexin. The bidding equipment mainly included diffusion, probe stations, measurement equipment and other categories. In August 2023, the wafer production lines in the statistical sample generated a total of 500 tenders. Mainly bidding for production lines such as Hua Hong Semiconductor, Jita Semiconductor, and Yuexin Semiconductor. The bidding equipment mainly includes diffusion, probe stations, and measurement equipment, mainly bidding for Huahong Semiconductor and Yandong Microelectronics. In addition, infrastructure projects are mainly bidding for Yuexin Semiconductor, SMIC, and Jita Semiconductor. From January to August 2023, there were a total of 969 tenders for wafer production lines in the statistical sample. Among them, Hua Hong Semiconductor, Jita Semiconductor, and SMIC ranked among the top three in terms of tender volume. Overall, the equipment bidding focuses on diffusion, etching, and probe station equipment.
　　
A total of 44 bids were won in August, mostly for diffusion, etching, and oxidation equipment. The overall winning proportion of domestic equipment was about 55%, and the proportion of domestic winning bids for oxidation, diffusion, and etching equipment was significant. In terms of winning bids, in August 2023, a total of 44 pieces of equipment were won on the wafer production lines in the statistical sample, mostly diffusion, etching, and oxidation equipment; the overall winning rate for domestic equipment was about 55%, among which oxidation, diffusion, and etching equipment The proportion of winning bids for domestically produced equipment is significant. From January to August 2023, the wafer production lines in the statistical sample won a total of 270 pieces of equipment, mostly gas-liquid systems, etching, and measurement equipment; the overall winning rate for domestic equipment was about 50%, among which deposition, PECVD, epitaxy , detection, and oxidation equipment have a higher proportion of domestically produced winning bids.

　　Domestic semiconductor equipment manufacturers in the August statistical sample won a total of 24 pieces of equipment, with Northern Huachuang and China Microelectronics winning the main bids. The winning rate in the corresponding process links was 60%. In August 2023, domestic semiconductor equipment manufacturers in the statistical sample won bids for a total of 24 pieces of equipment, with Northern Huachuang and China Microelectronics as the main winning bidders. The winning rate in the corresponding process links was 60%. Among them, Northern Huachuang won the bid for 22 pieces of equipment, mainly including diffusion, etching, and oxidation equipment. The winning proportions in the corresponding process links were 50%, 44%, and 100% respectively. China Microelectronics won the bid for 2 etching equipment, and the winning rate for the corresponding process links was 13%. From January to August 2023, domestic semiconductor equipment manufacturers in the statistical sample won a total of 96 equipment bids, with Northern Huachuang and Wanye Enterprises leading the way in winning bids. From January to August 2023, the total number of bids won by domestic semiconductor equipment manufacturers in the statistical sample was 41% in the corresponding process links. Among them, Northern Huachuang's epitaxy and oxidation equipment and Tuojing Technology's PECVD equipment are leading in the proportion of winning bids in the corresponding process links.

Has anyone listened to the Hidden Forces episode 329?

Dylan Patel blamed the lax sanctions and semi industry lobbying for making SMIC’s N7+2 possible. ASML’s NXT:1980 series that SMIC is still allowed to buy is more than capable of manufacturing at 7nm as already demonstrated by Intel and TSMC. Thanks to its high overlay capability, it may be used for 5nm as well, albeit at great reduction in productivity.

According to this week’s report by Reuters the US is preparing to tighten the sanctions this month

The authors are pointing at ASML as one of the potential losers in the new round of sanctions.

tphuang said:

oh, my bad, physical resolution here is meaningful in comparison to gate pitch rather than the common node we talk about

Interesting stuff here. But this brings up another question for me. So N7 uses 40nm (or 42nm in case of SMIC N+2), so it makes sense that is below practical physical resolution limit of Arfi scanner. I'd imagine for 14nm process, the gate pitch would be between 40 and 76nm, likely above 45nm, why would that still require multi-patterning?

Click to expand...

tokenanalyst said:

My guess once you are reaching the resolution limit on an optical system, in the case of ASML immersion scanners, 40nm, everything gets more complicated to get good results, there are techniques phase shift masks, OPC and so on but still. I think multi Patterning allow you to stay away from the resolution limit and still get smaller denser features, basically for cheap, otherwise it will require costlier mask solutions. Even with EUV single pattering is a problem the closer you get to the resolution limit because random effects so fabs may still want to use multi patterning to stay away from the resolution limit.

Click to expand...

european_guy said:

Due to CA (chemically amplified) photoresist with very high non-linear contrast response. This is the secret to shrink resolution well below the light source's one.

Here is very well explained how it works:

But if we limit the discussion to litho machine alone, as others already explained, the main difference between an entry level immersion machine for 28nm node and the top ones is the position accuracy so to allow very aggressive multiple exposures on even smaller components. We are talking of

Please, Log in or Register to view URLs content!

at 296 wafer per hour for the ASML NXT:2050i.

Click to expand...

@tphuang, you are mixing CD pitch with feature/resolution limit (which is half pitch).

hvpc said:

@tphuang, you are mixing CD pitch with feature/resolution limit (which is half pitch).

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Got it. So for feature/resolution limit of 40nm, anything below 80nm would require multi-patterning?

I'm going to have to read up some materials on this. Thank you