Chinese semiconductor industry

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ansy1968

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If A17 chips powered by N3 is as disappointing as reported, then SMIC N+2 plus and N+3 can have 3 years or more to remain competitive on DUV iterations alone until A18 chips powered by TSMC N2 hits the shelf in 2026! Same for Snapdragon 8 gen 3 (4nm) and gen 4 (3nm) may still give Huawei/SMIC room to be competitive.
On the good side at least by 2026 only the Chinese (Beijing and Taipei) can produce both nodes. ;)
 

tphuang

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Opportunity for SMIC N+3 (5nm) to remain competitive even against TSMC N3B (3nm) if N3 gains are as mediocre/disappointing as reported?

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Key summary of N3:
  • Not much faster: only 10% boost in performance for A17
  • No more efficient: no claims of extended battery performance
  • Barely any more transistors: only 3 billion bump in transistor count (19b vs. 16b for A17 vs. A16)


TLDR: benefits of new 3nm is very disappointing in A17 chip compared to 5nm A16 chip.

If A17 chips powered by N3 is as disappointing as reported, then SMIC N+2 plus and N+3 can have 3 years or more to remain competitive on DUV iterations alone until A18 chips powered by TSMC N2 hits the shelf in 2026! Same for Snapdragon 8 gen 3 (4nm) and gen 4 (3nm) may still give Huawei/SMIC room to be competitive.
I don't think we should be expecting it. Based on what hvpc said, SMIC N+3 sounds like just N+2 slightly improved. In fact, I would just get rid of even N+2 and just imagine it as a continuously process where they improve maybe 10% per year over next 2 to 3 years in density level until they top out on what you can do with the tools that they have. And hopefully by then, they are already well on their way with testing EUV prototype.

So there are two issues with ever shrinking nodes:
1) dark silicon increasing as a % of available transistors
2) SRAM scaling stopping (as in N5 to N3E, SRAM cells didn't shrink at all)
Both of which takes away gains from additional transistors you can fit in a given die

The more I look at it, the more I wonder if we will hit the economic limit of shrinking a lot sooner than many have expected. We will see. As in, performance gain doesn't justify the extra cost. Maybe Apple is always willing to pay 25% more for each new generation for 10% gain in performance, who knows.

But a lot of the performance improvements for Huawei SoC won't be through more dense process, but improved architecture and advanced packaging. People keep talking about Huawei making chips. Yes, given the amount of work they will have to do in advanced packaging, they are making the chips. And they will have to do the hard work of figuring out how to squeeze additional 10 to 20% more CPU/GPU performance very iteration with maybe 5 to 10% additional transistors.

Either way, I think Huawei will have to keep working hard to achieve more with its hyper threading and improved core performance as well as improved GPU and NPU
so this is the one I was wondering about that I saw online and there looks to be 4 machines won in there. At least first one matches the description of previous packaging machine? Maybe the last one is an i-line lithography machine?
 

tphuang

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Other theory I just heard now (not through weibo!).

So people are speculating that SMSC is not using that much American tools, but using a combination of ASML (obviously), domestic + Japanese (TEL) equipments.

Now, I would be surprised if they are not trying to mix in some replacements since American tools no longer get serviced by American companies, but I would be surprised if they can just replace the American tools completely without a huge stoppage in production. Maybe they have subbed in some TEL and domestic equipment for part of the process.

Maybe they got more TEL equipments through secondary market.

But again, if they are getting fully cut off, I think Huawei needs a minimum of 20k wpm of 7nm from SMIC a year by middle of next year. So I wonder if SMIC has signaled to Huawei that they can get there.

Again, this is me speaking from the outside with no knowledge of how well validation of AMEC and NAURA tools are. As @tokenanalyst mentioned several types before, the tools that are used in 28nm also gets used in 7nm. so in my mind, once a tool becomes reliable for 28nm, it can probably be used somewhere in the 7nm or 14nm process
 

Clark Gap

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Look at the "RS144D" excimer laser in the upper left corner for the model number. However, this is not for immersion DUV lithography machines. It is dry type and has been mass-produced. The indicator is only 40w 4khz.

The immersion DUV lithography machine is an improved version of this light source, called "RS166Di", with an indicator of 60w 6khz, and was successfully developed in 2022.


View attachment 118667

Please do not post any information from lyman2003... He is horrible source.
 

tokenanalyst

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Shanghai shengmei launches negative pressure cleaning platform used for 3D packaged chips, to start delivery in Q1

Shengmei launches negative pressure cleaning platform to serve the rapidly growing core pellet industry​


Shengmei Semiconductor Equipment (Shanghai) Co., Ltd. (hereinafter referred to as "Shenmei Shanghai") (Science and Technology Innovation Board stock code: 688082), as a leading provider of wafer process solutions for semiconductor front-end and advanced wafer-level packaging applications Supplier, today announced the launch of a negative pressure cleaning platform to meet the unique needs of flux removal for core pellets and other 3D advanced packaging structures. This new product was developed by Shengmei in cooperation with several major customers. It has excellent process performance and can achieve no flux residue after cleaning. Shengmei announced that it has received a purchase order for this product from a large Chinese manufacturer, and delivery is expected to be completed in the first quarter of next year.

The semiconductor industry is exploring other architectures to make more powerful chips without shrinking transistor sizes, and interest in modular chip technology is growing. This "more-than-Moore" approach combines modular chips together to form more complex integrated circuits that offer improved performance, lower costs and increased design flexibility compared to traditional monolithic chips. The advantages. This kind of core will be widely used in servers, personal computers, consumer electronics and automotive fields. At the Core Particle Summit held not long ago in January 2023,Yole Intelligence Released the latest monitoring news on the chip market, saying that as the chip is applied to different platforms, the market penetration rate of high-performance packaging is expected to continue to increase. The market penetration rate in 2021 will be 24%, and this number will be 24% by 2027. increased to 39%.

Dr. Wang Hui, Chairman of Shengmei Shanghai, said: "Chip particles are a major market opportunity in the semiconductor manufacturing industry, but the unique challenges behind the opportunities cannot be effectively solved by relying on traditional cleaning technology. Shenmei Shanghai has cooperated with many important customers , jointly address the technical challenges faced in assembling core particles, and provide differentiated products and services to ensure the performance and capacity required for mass production. This negative pressure cleaning product can perfectly cope with this model and once again enrich our products combination, and seize opportunities in emerging markets.

About Ultra C v Negative Pressure Cleaning Platform

Removing flux used after reflow soldering is part of the advanced packaging process, and Ame Shanghai's Ultra C v negative pressure cleaning platform can meet this unique requirement. The size of equipment continues to shrink, and traditional seam flushing with high water pressure under atmospheric pressure is no longer applicable. By developing a product that can be cleaned under vacuum conditions, the hydrophilicity of the surface can be improved, allowing liquids to flow in extremely tight spaces, thereby completely removing flux residue in a reasonable time. For products with a very high degree of flux impregnation, a saponifying agent can also be added to achieve thorough cleaning.​

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tokenanalyst

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492 million yuan! Liande Equipment won the bid for BOE’s high-end module project​


Liande Equipment announced that the company recently received the "Notice of Winning Bid" from China Electronics Commerce (Beijing) Co., Ltd., confirming that the company has become a BOE high-end module project (referred to as "Project"). "), the total amount of the winning bid was approximately 492 million yuan.
Liande Equipment stated that the performance of the project will not affect the company's business independence. If a formal contract is signed and successfully implemented for this project, it will have a positive impact on the company's future operating performance.
Liande Equipment City is a domestic panel module equipment manufacturer. Its main products are semiconductor display automation module equipment, which is used in the middle and rear module assembly processes of flat panel display panels, mainly TFT-LCD, OLED, Mini/MicroLED and other display modules.
Its downstream cooperative customers include panel and consumer electronics companies such as BOE, CSOT, Apple and Foxconn. Based on the company's advantages in the field of display equipment, the company's module assembly equipment has been successfully expanded into applications in the field of automotive electronics, and has become a supplier of automotive electronics such as Continental Automotive Electronics, Bosch, and Desay SV.
In addition, Liande Equipment is actively developing advanced packaging processes such as wafer-level packaging and third-generation semiconductor-related equipment. At the same time, it continues to increase its production of blue films for lithium battery packs, liquid injection machines, cutting and stacking integrated machines, cell assembly and Pack segments. R&D investment in complete line automation equipment and other equipment.

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