Chinese semiconductor industry

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horse

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I think the value of the SMIC breakthrough isn't really to convince the Americans to relax the sanctions, but to dissuade the partners from following Washington's demands. It took the Biden admin a lot of effort to get the Dutch onboard, and this is what they've got to show for the suffering?

I still look at it as a technology war, and in practical terms.

As of today,
  • no 7nm chips are used in weapons systems
  • no 7nm chips are used in supercomputers 95% of them
  • no 7nm chips are used in rocketry
  • no 7nm chips are used in AI chips commercially for sale
This list is probably longer, where something strategically important, does not need or use a 7nm at the moment. The general idea is unmistakable.

The American notion of restricting chips to China, in the desire to restrict Chinese technological advances, that plan is finished and failed rather quickly.

The newest Apple iPhone might be a little faster than the Huawei Mate 60 Pro.

I say, that is kind of meaningless!? I don't play computer games on the phone, too old, almost demented?! Maybe. They bragging about Apple having a better and faster iPhone, so they can play iGames. They can stick that iNotion up where the iSun don't iShine.

By the time the Americans are building some weapons system or AI chip with 5nm, the Chinese will be right there doing the same, if not better.

They're stupid, but not that stupid. They probably already figured it out. Just this is too much for those racists in US politics to process.

Good.

:)
 

BlackWindMnt

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I don't know much about the technical aspect.

But the practical situation seem to be the opposite of your conclusion, with more modern PC-applications greatly benefiting from Hyperthreading, while back in 2010 or so you'd often get slightly worse performance.

Not sure if you're perhaps missing some points about branch predictions - where mispredictions causes stalling. Or certain cases where the threads don't conflict.
I wanted to keep it simple and cache misses was like the simplest example I could remember. I did some research into data oriented design which handle this use case how does one think about it's data and how to optimize to prevent cache misses.

I'm not that familiar with branch prediction I can vaguely remember if a branch prediction misses the whole instruction pipeline needs to be flushed and refilled. I can vaguely remember to prevent branch prediction it smart to order your data on which you are going to branching or prevent branching in your code in general.
 

tphuang

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Zhejiang starshine semi was formed in January 2022 with the goal of developing RF front end filter & module technology. SAW & BAW filters, duplexers & such

In April, signed deal to produce 120k wafers per year of 5G wafers

With recent news, it seems like things are coming together all along 5G. I think they might end up going from having little presence on upstream supply chain to dominating upstream supply chain in a short time, because they are the downstream companies & cutting off raw materials to upstream suppliers. And they are building up production quickly with many companies at the same time.
bringing this back up in light of my other research about abundance of sub 3GHz RF filter, but not enough higher frequency n78/n79 filters.

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本次星曜半导体发布的工作频率为4400MHz-5000MHz,封装尺寸为1.4mm x 1.1mm的5G n79超带宽BAW滤波器(参见Fig.2),正是在硬件层面有效解决这一共存难题的滤波器。5G n79工作频宽(4400MHz-5000MHz)高达600MHz,且与5GHz WiFi信道邻近,其滤波器必须兼顾满足超大带宽、高陡降和高抑制的性能要求。此次发布的5G n79滤波器运用了星曜公司的众多首创技术,如超宽带BAW技术、超薄薄膜控制技术、极精应力控制技术、点对点电容补偿技术等,一方面远远突破了传统SAW和BAW滤波器的工作带宽限制,另一方面也大幅度提高了LTCC等低Q值滤波器对相邻频段的抑制度。经测试(参见Fig.3),该款滤波器通带插损小于3dB,带宽达到600MHz,对5GHz WiFi所有信道的带外抑制均超过35dB,绝大部分超过45dB,带外抑制性能方面超越国外头部同行产品(参见Fig.4) 。
so they have their own n79 BAW filters. size just 1.4mm x 1.1mm, so you can make a lot of them per wafer (65-70k per wafer based on my calculation. using 70% yield, you can get 45-50k/wafer) -> matches what Sai Micro said about BAW filter it produces for memsonic

120k wpy x 50k chip/wafer = 6B chip/year if this get ramped up. If 3GHz and above represent 1/3 RF filter (let's say 30), then this is enough for 200m 5G phones

but in this case, just like in memsonic, it's going to take a while for production to be ramped up

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星曜半导体坚持以市场需求为导向、以核心技术为支撑的产品开发理念,不断深化产品线布局。基于SAW、TF-SAW、BAW技术,目前已开发30多款成熟滤波器、双工器、四工器等芯片产品,产品性均达到国内领先、国际一流水平。目前多款产品已顺利量产交付客户并得到客户的高度认可,月交货量超过2000万颗,且正在迅速增长中。此外,星曜半导体还推出了若干技术难度极高、国内稀缺的滤波器和模组芯片产品,如TF-SAW Band3/Band2/Band25/Band28F,BAW n78/n79NB/n79F/WiFi6E以及GPS LFEM等。公司将坚持以中高端产品为重点,不断丰富产品线,满足客户的不同需求
Presently, just 20m deliveries/month, so adding this new production line will increase capacity by a lot. But I would imagine even the production line they have now is likely to have a lot more capacity to ramp up
 

cctang

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no 7nm chips are used in AI chips commercially for sale
? The Nvidia A100 is 7nm, and the H100 is 4nm. The Ascend 910 from Huawei is also 7nm.

Going to 4nm helped the H100 to be 2x faster than the A100 (and presumably the 910), but in data center applications I’m not convinced it really matters.

Microsoft reportedly spent $4bb on 20k GPUs to support Bing AI… let’s say Chinese internet companies have to “waste” an additional $4bb on deploying 40k 7nm GPUs. So what? Huawei itself spent $23bb in R&D last year.
 

horse

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? The Nvidia A100 is 7nm, and the H100 is 4nm. The Ascend 910 from Huawei is also 7nm.

Going to 4nm helped the H100 to be 2x faster than the A100 (and presumably the 910), but in data center applications I’m not convinced it really matters.

Microsoft reportedly spent $4bb on 20k GPUs to support Bing AI… let’s say Chinese internet companies have to “waste” an additional $4bb on deploying 40k 7nm GPUs. So what? Huawei itself spent $23bb in R&D last year.

Opps, you're right, sorry.

Not sure how I did that, I guess I just did copy and paste, lol.

No AI chip is at 5nm for sale, that is what I meant to say. NIVIDIA and Biren both at 7nm AI chips.

I read that Intel has a 5nm AI under development, but like, who knows, when that will come to market or will it even sold to others.

:)
 

BoraTas

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Really depends on the code.
Code written with a high cache miss rate and that is also highly threaded might get some extra performance out of it.
When a piece of code has a cache miss, because the data is not in cache. The CPU will need to retrieve the data from memory making the code wait 300~400 cycles(could be a order smallers like 30~40 cycles) before the data arrives and the CPU core can continue. A core with hyper threading or SMT will try to do something else in those 300~400 cycles, interleaving other pieces of code that can run because all the data is already in cache.

It will do nothing for the theoretical max performance of a core but it might make shitty optimised threaded code perform better.
But it has been a while since i did high performance coding, so i might be mistaken
Hyperthreading means the core can act superscalar (executing more than one instructions simultaneously) more of the time. Hyperthreading's benefit for a code with a lot of cache misses would contextual and limited. Different threads are data independent (though if both threads are executing the same process, AMD and Intel SMT implementations do allow data sharing). Codes with a lot of cache misses would usually benefit easier from hyperthreading. Because it usually means the core is at least still executing something while a thread is stalled because of a cache miss. But such a code would still be of low performance because memory-cpu communication is the biggest bottleneck in computing. A code that is multi-threaded and has low amount of cache misses would be the fastest. Hyperthreading's gain would be more significant with such a code.
 

tokenanalyst

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The first jointly developed domestic MOCVD unit was successfully put into use, achieving high-quality GaN epitaxial growth!​


On September 6, in the ultra-clean laboratory of the material growth and equipment platform, scientific researchers from the National Third Generation Semiconductor Technology Innovation Center (Suzhou) conducted more than three hours of experiments and adopted the first domestically produced device jointly developed with domestic semiconductor equipment manufacturers. MOCVD equipment, the first batch of trial growth successfully produced high-quality GaN epitaxial wafers. Test results of the grown GaN epitaxial material: AFM surface Ra<0.5nm, XRD rocking curve (0002)<300arcsec, (10-12)<400arcsec, carrier mobility>600cm 2 / Vs .
The successful release of the first batch of high-quality GaN epitaxial wafers marks another solid step forward for the public R&D platform of the National Innovation Center (Suzhou) in assisting the industry in developing new equipment and supporting service capabilities in developing new technologies. It has important important Milestone!

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This equipment further improves the environmental stability of the cavity. Through the optimized design of core components, it achieves higher airflow adjustability and temperature consistency than traditional commercial equipment (shown in Figure 3). It can meet the epitaxial growth and device development of nitride materials and devices with higher epitaxial requirements (GaN-based Micro-LED, etc.).

The researchers carried out trial growth experiments on the equipment and used two-step growth technology to obtain the epitaxial layer of GaN single crystal material. In the first step, a low-temperature buffer layer is grown on the substrate. In the second step, the buffer layer is subjected to high-temperature heat treatment, and then three-dimensional roughening and three-dimensional to two-dimensional merging are performed, and finally the planar growth of low-dislocation GaN material is achieved. The thickness of the grown epitaxial layer is controlled to about 2 μm without any doping, and the performance of the device operation is verified at the same time (as shown in Figure 4).

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tinrobert

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I've met him irl. Dylan comes off as a ML enthusiast that thinks he's qualified to talk about chips and GPUs just because he's got low-level connections in Taiwan and Nvidia. The only bigshots that pay any attention to him are VC and software numbskulls like Sam Altman or Elon who don't know the first thing about hardware.


The Kirin 9000S is the first ever mobile ARM SoC to implement SMT. Has anybody posted about SMT hyperthreading perf for the Kirin chip?
I'm trying to understand why a new article on SMIC gets so much attention lately. I have said before on this thread that back in mid-2022 I already said SMIC was at 7nm. And I explained how SMIC was able to get there with just DUV. YOu can read it here:
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siegecrossbow

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I'm trying to understand why a new article on SMIC gets so much attention lately. I have said before on this thread that back in mid-2022 I already said SMIC was at 7nm. And I explained how SMIC was able to get there with just DUV. YOu can read it here:
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I think the recent release is a lot more theatrical than what we saw in 2022. Very few people use bitcoin miners, but everyone uses smartphones.
 
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