Chinese semiconductor industry

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staplez

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sorry, where is your proof Kirin-9000S is not fabbed at SMIC?

again, it's not fabbed there. Once you have the die, you still need to package and test it.

Do a little calculation. How many ASML machines do you need to fab the amount of chips Huawei would need? What about other equipments?

I understand people are excited about this chip, but let's again not blow Huawei out of proportion

I will say this again. I have sources that are outside of this forum!
I think you're right, but I also think there's a Huawei fab that's making the chip as well. Even if it's only 1 chip a year. It's actually super important for Huawei and in fact all of China to be able to say that. USA is already screaming up and down that they're going to ban SMIC for using US equipment. If Huawei has just one line that is completely de-Americanized that they can prove, then US suddenly has nothing to say. So even if that fab only makes 1 chip a year, it's still highly valuable.
 

tokenanalyst

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Chengdu Wanying advanced packaging and testing pilot platform and production line project completed and put into operation​

The Chengdu Wanying advanced packaging and testing pilot platform and production line project was completed and put online.
According to information from the Electronic Information Industry Bureau of Chengdu High-tech Zone, the project will focus on high-end solutions and advanced packaging technology, build three production lines of high-reliability plastic packaging, high-reliability ceramic packaging and system-level packaging, and build a reliability and failure analysis laboratory. , forming a full industry chain service model of packaging solution design, simulation, proofing, mass production and reliability and failure analysis. It has advanced packaging technologies such as high-reliability plastic packaging, high-end ceramic packaging, system-level packaging and TSV, RDL, etc., and can complete wire bonding , advanced packaging based on flip-chip soldering.
Chengdu Wanying Microelectronics Co., Ltd. was established in 2021. It is one of the first batch of advanced microelectronics packaging and testing enterprises introduced by the "Minshan Action" in Chengdu High-tech Zone. With the support of the government, it established the "Minshan Microelectronics Advanced Packaging and Testing Technology Research hospital". The company focuses on advanced packaging fields such as RF SiP, radiators, and high-reliability plastic packaging, and provides packaging services to high-end integrated circuit design companies, universities, and scientific research institutes.

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Maikeru

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Dylan Patel dropped a long article on SMIC 7nm.
He says SMIC can easily scale to 30k WPM of 7nm with their existing tools without taking anything from trailing edge fabs.


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Fascinating article. Re the last part, "What Can be Done", how many of thosepossible measures are realistically likely to stop China's IC industry "in its tracks"? And what could China do to retaliate?
 

tphuang

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I think you're right, but I also think there's a Huawei fab that's making the chip as well. Even if it's only 1 chip a year. It's actually super important for Huawei and in fact all of China to be able to say that. USA is already screaming up and down that they're going to ban SMIC for using US equipment. If Huawei has just one line that is completely de-Americanized that they can prove, then US suddenly has nothing to say. So even if that fab only makes 1 chip a year, it's still highly valuable.

The thing is. getting yield up is hard.

Based on what @tinrobert said before, you need about 20 DUVs for 50k wpm of 7nm.

so SMIC should have about 14 DUVs for 35k wpm in SN1 (when it fully ramps up). Probably 1/4 to 1/3 of that at least as to be 2050i. On top of that, you need top of the line etching machines, which is why @hvpc keeps referring to 20k as the limit, since AMAT tools are being used for SMIC's existing process.

Now, I do not know if they are able to get this tools from other fabs. I would imagine not.

There is just no evidence that HW has a facility for this stuff with this much tools. I do think they likely have a large packaging & testing facility for Kirin 9000S with dies supplied to them by SMIC
 
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56860

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Dylan Patel dropped a long article on SMIC 7nm.
He says SMIC can easily scale to 30k WPM of 7nm with their existing tools without taking anything from trailing edge fabs.


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”The US government and its allies could stop the Chinese semiconductor industry in its tracks. Here are some steps that could be taken to ensure that China does not develop the ability to mass-manufacture the sorts of chips needed for high-end military applications in the coming years:

  1. Limit ArFi immersion lithography tools.
  2. Limit servicing of existing equipment.
  3. Limit ArFi photoresist.
  4. Limit masks.
  5. Limit mask blanks, writers, and other associated infrastructure.
  6. Limit metrology equipment.
  7. Limit CMP equipment.
  8. Limit epitaxy equipment.
  9. Limit dry etch equipment.
  10. Limit CVD and ALD equipment.
  11. Limit advanced packaging equipment.
  12. Limit ion implantation equipment.
  13. Limit semiconductor manufacturing equipment subsystems and subassemblies.
  14. Limit etchant gas.
  15. Limit deposition precursors.
  16. Limit chips that have >25.6Tbps of IO even if they have no compute.
  17. Limit chips that have >1000TOPS of performance.
  18. Limit the
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    .
  19. Limit EDA tools.
  20. Limit Joint Ventures and inbound investments.


Half measures will not work, but a full-scale assault will make it so the cost of replicating the semiconductor supply chain domestically is neigh on impossible. While we aren’t advocating for any of these specifically, it is clear the west can still stop China’s rise if decisive action is taken.“

Thoughts?
 

tphuang

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Fascinating article. Re the last part, "What Can be Done", how many of thosepossible measures are realistically likely to stop China's IC industry "in its tracks"? And what could China do to retaliate?
he is living in the lala land on that last part. Aside from photoresists, there really is nothing more that can be done. And more importantly, domestic photoresist (as Shanghai Sinyang & Xuzhou Bokang have said) are ready for FinFet. I would imagine there are quality and capacity concerns there still, but these are things that will get worked out over time. After the recent all encompassing restriction that Japan just announced, I doubt it will be easy for Biden to Coax them into another one so soon.

Dylan Patel dropped a long article on SMIC 7nm.
He says SMIC can easily scale to 30k WPM of 7nm with their existing tools without taking anything from trailing edge fabs.


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i mean, I think there are some good points in there.

As mentioned earlier it is on par with Samsung’s 4LPX in performance and power. The big questions are
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and volume. While some pundits claim the yield is only 10%, we don’t believe that. In fact, we believe that SMIC’s process has good yield. There’s no definitive number here, but there are some data points that indicate this.

Why? We’ve heard a few soft remarks from our sources in China that yield is good. Allegedly their D0 is currently about ~0.14. For reference, TSMC’s N5 and N6 nodes are about half that. TSMC of course is the gold standard, and Samsung/Intel “7nm” are closer although still ahead of what SMIC has achieved. Yield being this decent already is a huge flag that the SMIC N+2 process technology is healthy and developing. Parametric yield is the more important, unknown metric. But hearsay isn’t enough on its own.
The last reason is related to the apparent binning of the chip. "Binning" in semiconductor manufacturing refers to the process of sorting and categorizing integrated circuits (like CPUs or GPUs) based on their performance and quality after they have been manufactured and tested. While chips can have defective transistors, called catastrophic yield, in many cases, working transistors still fail various performance and power tests. This is known as parametric yield. If a process technology has low parametric yield, the firm managing yield for the chip can make the binning process less stringent to improve the parametric yield. More chips can pass various tests, but it also leads to higher variability.

This has been done with mobile chips that yielded poorly in the past, for example the Qualcomm S8G1 on Samsung’s 4LPX. In the case of the S8G1, different devices with the same chip would have differences upwards of 10% on fully heat soaked devices in the same environmental conditions. While we haven’t seen rigorous testing of many devices in the same environment, there is enough on various Chinese forums to show that device to device variation is quite low.

None of this is bullet proof, but we believe that SMIC has good yield, and the 10% yield number some pundits have said is nonsense to downplay the significance. This is a real high volume production process technology. Just like Apple is the guinea pig for TSMC process nodes and helps them ramp and achieve high yield, Huawei will likewise help SMIC in the same way.
i actually don't know what D0 of 0.14 would translate to, but this site
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using 1.1 cm^2 would result in yield of 85%. That seems a little high. But I think getting over 70% now for something with 110mm^2. again, i'm very surprised they will go with just kirin chip here unless yield for 110mm^2 die can be pretty high

since they need 150mm^2 SoC for tablets and 200mm^2 cpus for laptop/desktop and 500-600mm^2 die for HPCs
All of which will see progressively worse yield. 0.14 for 500mm^2 die is about 50% yield
 
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FairAndUnbiased

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Really happy with how AMEC is turning out to be. Looks like they are gonna be a true LAM Competitor. Both Naura and Piotech need to step up their game too and match AMEC. For some reason, it feels like Naura is not trying to be cutting edge like AMEC, they are more like, we want to cover the old processes (28 nm and beyond)
Both LAM and AMAT have a full range of products. They still sell new build 150 mm and 200 mm instruments and still invest in new tech for those wafer sizes, which usually are 90+ nm process nodes.
 
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