Chinese semiconductor industry
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antiterror13
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He is from SDF - @BoraTas
ahhhhh, nice to have such a knowledgeable member
antiterror13
Brigadier
one of the comment said
'George Tait Edwards
I think China is certain to win the UAV development game for the reasons Bora Tay sets out. Nothing beats lots of Chinese R&D money plus the recruitment of key UAV staff at high wages plus the Chinese use of computer-integrated IoT 2025 upgraded assembly lines to mass produce this kind of very high end equipment.
I used to think I was special because I’m over 3SDs above the average IQ level. But China has 300,000 people in my bracket and the whole West only has 70,000.
These VHIQ STEM+ Chinese are absolute world-beaters because they co-operate in R&D groups while they tend to be isolates in the West.
There’s only a very limited contest given that situation."
Woww, his IQ is over 100 + 3 *15 = 145 ... very high. and he said there are 300,000 people like that in China and only 70,000 the whole West
Interesting how average IQ for each country
@antiterror13 Sir we are blessed to have soooo many knowledgeable esteem members in this forum and are willing to impart their wisdom.
@hvpc Bro NO problem I really respect your wisdom having work in the industry, you know your way around and I'm happy your willing to share your experiences BUT bro don't you want info regarding what's happening inside China IC and here is one of them ( regarding 5nm laser) the rest are semantics.@ansy1968,
I am aware of your views. I think you are lumping a lot of stuff together and making quite a bit of assumptions. Even though I am rooting for China's semiconductor progress, I do not share your assessment of our current situation. I'm actually not happy about the progress we are making as I think the gap to target is not closing fast enough. I'm a bit frustrated, actually.
I think it's futile to debate and try to get us to take on the other's assessment this is why I don't make posts on my personal feeling, assessments, or speculations, etc. I also don't try to educate or "teach" in case people interpret it as me talking down to people. I now try to as much as possible only posts and share actual information or respond to questions. I often draft long responses only to delete them before sending because I'm trying not to create controversy as much as possible.
So let's agree to disagree, if that's alright with you.
@antiterror13 Sir the commenter comments really is the main reason for the rapid progress China is achieving. However small the Chinese company are , there are cross pollination of ideas as they adopt the Whole Nation approach strategy to leap frog their opponent. Cause come on! It's obvious, we should follow XJP principle of Common Prosperity are we...lol
Yes I crave new info. But I think you had shared these same old tidbit of info several times before already.
The video and the "5nm DBG" tool are more propaganda than factual. DBG is a backend assembly process step, it has nothing to do with frontend IC manufacturing. Backend technology is neither state-of-the art nor complex and almost never use frontend process moniker in its name. The fact that the article shoved the '5nm' in the description is either ignorance or a clever click-bait scheme to draw attention and to confuse. It's one thing to described the said DBG equipment is used for all wafers including 5nm node, but it's completely another (and not okay) to say it's a 5nm machine. This is not even an apple to orange comparison (comparing different FE equipment sectors), it's more like apple to cabbage. LOL.
But, do keep the new info coming. I do look forward to those type of sharing.
It will become very very complex in the coming years as Moore's law comes to an end, especially advanced packaging.
Advanced packaging tool performance will be improved but still not state of the art.
For example, backend steppers resolution has been in the 1um / 2um range whereas frontend scanner resolution is now at 13.5nm and moving even lower. Even the frontend iline scanners/steppers has resolution limit of 0.28um (280nm).
Going into heterogeneous integration, backend lithography tool will have to move into the gap that previously separated frontend and backend litho. The 2.5D/3D steppers from SMEE will be redefined to provide improved resolution down to 0.5um.
So, yes, backend tools are expected to have improved performance, but again, it's still not state-of-the-art compared to frontend tools. We'll be mostly implementing or porting known features or methods learned from frontend to backend.
Like I said earlier, since advanced packaging will be dealing in a larger physical size range (on a "um" scale), we could afford much much larger error tolerance, so hence not difficult at all (relative to the technology we have to come up with on a "nm" scale in the FE).
P.S. state-of-the-art = higher price tag. you can clearly see the difference in the level of technology by looking at the big price delta between FE & BE equipments. And new BE tool may be state-of-the-art versus older BE tool, but compared to older FE tools, it's still not very "state-of-the-art". It's all relative. right?
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