@tokenanalyst , any idea who makes Horizon Robotic's chips? Could it be SMIC's N+1 process? This would be good news for SMIC.
Chinese semiconductor industry
- Thread starter Hendrik_2000
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I'm only aware of hybrid bonding for advanced packaging, which is based on van Der Waal force to hold two chips together. This is what tsmc is looking into for their future advanced packaging needs.
Xtacking is a YMTC marketing term. If I remember correctly they use wafer to wafer fusion or hybrid bonding.
The report don't say the node size. But it could be. Chinese AI companies are starting to use Advance packaging techniques to get more performance out their solutions using mature nodes.
We are talking about the same thing.
just curious, are you aware of any bonding that's not between copper to copper?
Yes, there's also silicon to silicon direct wafer bonding, as well as silicon-metal-silicon, and dielectric-dielectric.
Very nice that they were able to make this work. I wonder if this is production ready with acceptable yield? It also look like they use foreign HBM since no one in China could do D1y yet.
this paper talked about using 3D boding (hybrid bonding) that is same as YMTC Xstacking as well as using 2.5D packaging (TSV) to stack HBM (high bandwidth memory). For those interested about various methods used in HITOC from interposer, TSV, to hybrid bonding, this paper may be a good read.
The paper's conclusion is of no surprise. One important thing this paper din't touched on is the cost; the extra cost from yield loss and the extra cost with the extra manufacturing steps and integration steps. Using HITOC w/ less advanced chips to achieve performance of more advanced chip is no surprise. The biggest reason why industry stuck with 2D shrink is the is still cheaper. But with 2D shrinking hitting a wall soon, heterogeneous integration will definitely become more main stream. I think this will start to happen as soon as 2nm node comes around. But because China have no access to advanced chips, it will be forced to go with this more expensive option sooner (at older logic/dram nodes) than rest of the world.
antiterror13
Brigadier
I agree to all of your items there. I thing the reason SMIC spending is not spectacular, because SMIC is waiting for local lithography machine become available ... there is no point spending huge capital and then get sanctioned by the bully, and the bigger SMIC is the more chance will get sanctioned. I think the important point is in 2023 - 2025 when local Chinese lithography manufacturers (SMEE, etc) may finally able to produce reliable high end DUV equivalent to ASML 2050i with perhaps 1/2 price, at that point I believe SMIC and others will invest hugely. There is a chance that China may break EUV litho in 2026-27, could be revolutionary with SSMB
Well, I think everyone on this forum would certainly hope so.
Since I'm closer to the industry than most of you, I'm a bit more skeptical based on what I'm see and hear. But, I'd love if I' proven wrong. : )
How old is the info in the link you provided? I'm surprised at these two statements as it seems to differ from what was shared I this forum recently:
"A completely operational SSMB source has still to be demonstrated."
"If funding is forthcoming, the Tsinghua team hope to construct a dedicated SSMB storage ring in Beijing, says Tang.“If things go well, we plan to build it in the following five to six years.”"
What's your interpretation/take on this?
maybe I mislead you. hybrid bonding today is mostly between silicon/silicon wafers, but the bonding pad material is copper.
I'm not following/understanding the "types" of wafer bonding you mentioned. Could it be that we are talking about the same thing but using different terminology?? everything you listed, I'm just calling Hybrid Bonding.
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