important progress in the research of ultra-steep vertical transistor devices
Xidian research team used an ultra-thin two-dimensional heterostructure to create a VTFET semiconductor channel and vertically integrated it with a resistive threshold switch (TS) to realize an ultra-steep vertical transistor (TS-VTFET). This device technology relies on the excellent electrostatic regulation of ultra-thin two-dimensional semiconductors to greatly improve the device's gate control capability; at the same time, with the help of the voltage-controlled "insulating-conducting" phase change characteristics of the resistive threshold switch, the device's room temperature sub-threshold swing reaches 1.52 mV/dec, which is well below the theoretical limit of conventional MOSFET room temperature subthreshold swings higher than 60mV/dec. In addition, in the published proof-of-concept work, the ultra-steep vertical transistor prepared by the research team showed strong performance, including a current switching ratio higher than 8 orders of magnitude, a sub-60mV/dec current range exceeding 6 orders of magnitude, and a leakage current less than 10fA. It provides a new solution for high-performance and low-power transistor technology in the post-Moore era.