Chinese semiconductor thread II

Legume7

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Weibo user Fixed Focus (定焦数码, highly credible) reports that SMIC N+3 (5.5 nm) was actually commercialized last year, and that N+4 (5 nm) is being tested. The post was later deleted.

An interesting and major twist. Reliable information indicates that the N+3 process was actually commercialized last year. In the future, this process node should be officially named 'N+4' (N+5 nm equivalent). The overall prediction appears to be quite accurate.

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Given the shocking nature of this rumor, even though it is from a reliable source, we should take it with a grain of salt. We can, however, verify the part about N+3 being commercialized very soon since it should appear in the next Huawei Mate/Ascend product. The rumor aligns with credible rumors that SMIC is shifting some of its 7 nm production line to domestic lithography since this frees up the ASML machines for N+3.
 

pbd456

Junior Member
Registered Member
Weibo user Fixed Focus (定焦数码, highly credible) reports that SMIC N+3 (5.5 nm) was actually commercialized last year, and that N+4 (5 nm) is being tested. The post was later deleted.



View attachment 148579


Given the shocking nature of this rumor, even though it is from a reliable source, we should take it with a grain of salt. We can, however, verify the part about N+3 being commercialized very soon since it should appear in the next Huawei Mate/Ascend product. The rumor aligns with credible rumors that SMIC is shifting some of its 7 nm production line to domestic lithography since this frees up the ASML machines for N+3.
I thought the first generation of smee duv is not capable to do 7nm
 

pbd456

Junior Member
Registered Member
The rumor is that the 7 nm process on SMEE DUV is not as good as the original N+2, hence the reduced clocks and cut down GPU on the Kirin 9020A vs. the Kirin 9020.
I really doubt if smee duv is used for 7nm. It would make the most sense to start with 28nm process and work the way up
 

OptimusLion

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Amber Intelligence Semiconductor Equipment (Shanghai) Co., Ltd. focuses on advanced packaging and integrated circuit manufacturing process equipment. Our products include pressure ovens, vacuum formic acid reflux equipment, vertical furnace tubes, and high-pressure hydrogen annealing equipment. The company's core team has rich experience in semiconductor management and R&D.

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JPaladin32

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Weibo user Fixed Focus (定焦数码, highly credible) reports that SMIC N+3 (5.5 nm) was actually commercialized last year, and that N+4 (5 nm) is being tested. The post was later deleted.



View attachment 148579


Given the shocking nature of this rumor, even though it is from a reliable source, we should take it with a grain of salt. We can, however, verify the part about N+3 being commercialized very soon since it should appear in the next Huawei Mate/Ascend product. The rumor aligns with credible rumors that SMIC is shifting some of its 7 nm production line to domestic lithography since this frees up the ASML machines for N+3.

I wouldn't call him reliable. It depends on what he's talking about. Rumors from him on smartphone specification predictions are more or less okay, but his info on semiconductor supply chain can be wildly wrong. He was one of the people talking about N+3 and 8+6+4 wide Kirin cores on Mate 70, which in the end proved to be completely wrong.

In fact, even this news is copied from somewhere else. I know the source of this rumor which was posted a couple of days ago with exactly the same words. That source claimed 125MTr/mm2 and that N+3 entered production last year. Judging by his track record I would suggest caution on semiconductor rumors from him.
 

LanceD23

Junior Member
Registered Member
Some of the areas I thought China is lacking supplier on. ANybody know domestic suppliers for the following chips. Mostly analog and mixed signal chips.
*opto isolator/opto coupler
*6 axis gyroscope*
*3 axis accelerometer
* ethernet network transformer
* fuse for protection
* thermistor ( suppresses inrush current generated during startup)
* full bridge rectifier and Schottky Rectifier
*Moisture sensor
*USB hub controller
*bidirectional level converter/logic converter
*High-speed CAN transceiver
*Ethernet transceiver
 

OptimusLion

Junior Member
Registered Member
Advanced packaging is poised to rise to the sky - Introduction to Yongsi Electronics' FHBASP packaging platform based on chiplets

Yongsi Electronics' FHBSAP® technology platform has successfully overcome many technical difficulties and innovatively developed a series of cutting-edge advanced packaging technology achievements, including RWLP series (wafer-level reconstructed packaging, Fan-out fan-out packaging), HCOS series (2.5D wafer-level/heterogeneous packaging on substrate), Vertical series (wafer-level vertical chip stacking packaging), etc., accurately adapting to the diversified advanced packaging technology needs such as Fan-out (FO), 2.5D/3D advanced wafer-level packaging, injecting strong momentum into the development of the industry.

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tokenanalyst

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8-inch gallium oxide wafer substrate is launched | Hangzhou Gallium Ren invites you to SEMICON to witness the new breakthrough of the semiconductor industry​


On March 25, 2025, Hangzhou Gallium Semiconductor Co., Ltd. (hereinafter referred to as "Gallium Semiconductor") has made another breakthrough after releasing the world's first 8-inch gallium oxide single crystal. Based on the independently innovative gallium oxide single crystal growth technology and large-size substrate processing technology, it has successfully prepared the world's first 8-inch (200mm) gallium oxide wafer substrate. my country's fourth-generation semiconductor gallium oxide wafer substrate has taken the lead in entering the 8-inch era, which not only fills the gap in the global gallium oxide industry, but also marks that my country has achieved a leap from following to leading in this field.
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1. The significant industrial value of 8-inch gallium oxide wafer substrate
China's gallium oxide industry has taken the lead in entering the 8-inch era. Its industrial value can be reflected in three dimensions:
First, at the technical compatibility level. The 8-inch gallium oxide substrate is well adapted to the existing 8-inch manufacturing system of the silicon-based semiconductor industry, accelerating the industrialization process. This production line compatibility advantage can effectively shorten the technology conversion cycle and reduce the cost of enterprise technology upgrades.
Second, at the economic efficiency level, the upgrade of substrate size has brought about a significant improvement in material utilization, and the number of chips that can be manufactured on a single wafer has increased exponentially. Combined with the optimization of production processes, it will promote a breakthrough reduction in the unit cost of gallium oxide devices and achieve a significant improvement in production efficiency at the same time.
Third, at the industrial strategy level. China is the first country in the world to overcome the technical barriers of 8-inch gallium oxide preparation, which not only marks a major technological breakthrough in the field of ultra-wide bandgap semiconductors, but also forms an industrial competitive moat by establishing a first-mover advantage. This technological leap has enabled my country's semiconductor industry to gain a key voice in the reconstruction of the global value chain and laid a solid foundation for building an independent and controllable semiconductor industry ecosystem.

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