Chinese semiconductor thread II

tokenanalyst

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Dachen leads the investment in the nearly RMB 100 million Series A financing of the semiconductor high-end laser equipment company Rasontech​

Founded in October 2021has been focusing on the research and development and manufacturing of high-end laser equipment in the semiconductor industry. Relying on the entrepreneurial team's nearly 30 years of deep industry experience and overseas background, it has successively completed the forward research and development layout of multiple series of equipment such as substrate level, packaging level, and wafer level. The products have been successfully shipped to domestic first-tier manufacturers and have been certified, and it has quickly become a dark horse in the field of high-end laser equipment in the domestic semiconductor industry. At present, Raytheon Technology sells nearly 20 types of semiconductor-specific equipment, which are widely used in high-speed, high-precision, and composite micro-nano processing in the fields of semiconductor wafer manufacturing and advanced packaging.

Huang Gang, the founder of Raysun Tech, said that with the maturity of laser technology, laser equipment in various fields in China has developed rapidly in recent years. However, in the field of micro-nano processing involved in high-end semiconductor wafer manufacturing and advanced packaging, Japanese and Korean companies have firmly occupied most of the market share of leading customers by virtue of their industrial and regional advantages. Since its establishment, the company has insisted on forward research and development, and has successively completed the research and development of multiple core independent technologies such as software algorithms, ultrafast lasers, optical control platforms, and composite motion platforms. The developed equipment includes wafer-level cutting, wafer-level grooving, wafer-level core marking, packaging-level uPOP drilling, and RF module TSA film cutting, which have reached the international leading level in terms of processing accuracy, production efficiency, and operational stability. At present, the company's products have begun to attract the attention of overseas customers . In the future, Raysun Tech will be based in China and gradually radiate overseas markets, striving to become a leading laser comprehensive solution provider in the semiconductor industry.​

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tokenanalyst

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Impact of ambient temperature on electrothermal characteristics of gate-all-around nanosheet FETs​

East China Normal University (China)​

Abstract​

In this paper, the impact of ambient temperature on self-heating effects (SHEs) of 5nm gate-all-around nanosheet FETs (NS-GAAFETs) is investigated. The electrical characteristics of DC and AC, as well as the thermal characteristics of steady and transient state, are analyzed. Through numerical evaluations, it is shown that the ambient temperature strongly affects the electrothermal characteristics of NS-GAAFETs. With the ambient temperature increasing, the performances of NS-GAAFETs significantly deteriorate, where the on-off ratio ION/IOFF and sub-threshold swing SS decrease by 90.5% and 19.5% respectively.

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sunnymaxi

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Not really. Samsung used EUV for dram and have now been excommunicated from Nvidia. Tsmc n3b failed. N3e succeeded which uses fewer EUV layers.
Samsung’s Outlook for High-NA EUV Adoption.

Samsung is expected to adopt ASML’s first High-NA EUV equipment, the “EXE 5000,” as early as the first half of this year. It has been reported that Samsung has been conducting process evaluation and assessments for High-NA EUV equipment since last year.

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gelgoog

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I know that EUV is to blame for Intel and Samsung failures, also is the main reason why today people wanting decent GPUs need to sell their kidneys to afford them, I just saying that by looking at the graph most ASML immersion sales are going to China.
No. Intel failed because they did not have EUV. They tried milking DUV for all it was worth, including with new materials and new multipatterning techniques, the new materials caused issues and their original 7nm process with DUV was a bust. Later they renamed "10nm Enhanced Superfin" as Intel 7 to paper over that. Intel's original 7nm was changed to use EUV in critical layers and renamed to Intel 4.

Intel kept using DUV because using EUV would have cost a lot of money building and tooling factories and this would mean their dividend would likely have to be reduced or eliminated to pay for these. Since Intel management are also shareholders you can guess how we come to this.

Intel kept milking their old tools as much as they could. In a market without competition that could have worked but AMD with TSMC is a nasty combo against them.
 
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tokenanalyst

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No. Intel failed because they did not have EUV. They tried milking DUV for all it was worth, including with new materials, the new materials caused issues and their 7nm process with DUV was a bust. Later they renamed "10nm Enhanced Superfin" as Intel 7 to paper over that.
I am saying bc their recent "failure" with their latest nodes. They are going slow and not getting the necessary yield. Intel failure to ramp up their latest node with LowNA is one of the big reasons why ASML is rushing HighNA lithography, Pat even resigned to accept a smaller field size, limiting how much of the chip can be patterned in a single scan.
 

gelgoog

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I am saying bc their recent "failure" with their latest nodes. They are going slow and not getting the necessary yield. Intel failure to ramp up their latest node with LowNA is one of the big reasons why ASML is rushing HighNA lithography, Pat even resigned to accept a smaller field size, limiting how much of the chip can be patterned in a single scan.
Intel is behind because they started using EUV so late. And they are taking forever to build the new fabs.
High NA was a bet to try to pass TSMC over again. But it is wildly expensive. The smaller field size was necessary IIRC because otherwise the lithography machine would just be too large. It is already the size of a bus as it is. Because of the size of the EUV machines, especially High-NA, you have to build new fab buildings. You cannot just reuse an old fab shell and put in new equipment.
 

tokenanalyst

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Intel is behind because they started using EUV so late. And they are taking forever to build the new fabs.
High NA was a bet to try to pass TSMC over again. But it is wildly expensive. The smaller field size was necessary IIRC because otherwise the lithography machine would just be too large. It is already the size of a bus as it is.
Agree, but there are some intrinsic problems with EUV, not necessary the lithography machine itself but with the ecosystem, modern EUV photoresist doesn't have a high contrast with these high energy photons, maybe with higher dosage but that will reduce throughput. therefore the need for higher power light sources like SSMB.
 
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