They had issues initially but then they relaxed the process and yields went up. TSMC N3E and later, with higher gate pitch, have good yields.TSMC doesn't have real issue with 3nm.
Who in their right minds would want to design for a process without proper PDKs in their EDA tools when TSMC is available?Intel is also incompetent at getting other customers for its non leading edge product, so all that 10nm is sitting idle
Who would want to pay more to make a chip at Intel, having to use more cumbersome design packages which mean more work you have to do yourself when you can just select and click a pre-done package when designing for TSMC.