Chinese semiconductor thread II
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They did，but only available for paid members
"HiSilicon Kirin 9010 Digital Floorplan Quick Look Analysis" is still not available.
What is available is "New Processor Alert: HiSilicon Kirin 9010 Powers the Huawei Pura 70 Ultra".
"Huawei Pura 70 Ultra (HBP-AL00) Mobile RF Architecture" is not yet available either.
What is available is "New Processor Alert: HiSilicon Kirin 9010 Powers the Huawei Pura 70 Ultra".
"Huawei Pura 70 Ultra (HBP-AL00) Mobile RF Architecture" is not yet available either.
Looks like Kirin-9000C is coming out to power latest PC from Huawei. Octa-core with 12 cores through SMT, so this should be similar to 9000S in usage of Taishan cores and not one of the stocked up chips from TSMC
3.5 billion yuan! Domestic new semiconductor materials settle in Shiyan, Hubei!
Shiyan City, Hubei Province held a centralized start-up event for major projects in the city in the second quarter of 2024. The main venue in Shiyan was located in Fangxian County, and branch venues were set up in various counties and cities. Concentrated construction projects include semiconductor new material manufacturing base projects, etc.
Qinchu.com news shows that the semiconductor new material manufacturing base project is located in the High-tech Development Zone of Shiyan City, Hubei Province, covering an area of 200 acres. Hubei Guoda New Materials Group Co., Ltd. invested 3.5 billion yuan. It mainly builds quartz crucibles for purification and processing of high-purity quartz.
Manufacturing production lines for semiconductor new material-related products such as the preparation of spherical silica powder for chip packaging, as well as ancillary facilities such as the Semiconductor New Materials Research Institute, the Mineral Materials Testing Center, and the living area for scientific researchers.It is reported that the project will be constructed in two phases, with an investment of 1.5 billion yuan in the first phase, covering an area of 100 acres, and building a fully automated high-purity quartz purification production line with an annual output of 20,000 tons with completely independent intellectual property rights. The second phase investment is 2 billion yuan, covering an area of 100 acres, to build a high-purity quartz purification production line with an annual output of 50,000 tons and a high-purity spherical silica powder production line with an annual output of 50,000 tons for chips. After the project is fully completed and put into operation, it is expected to achieve an annual output value of 6 billion yuan and a tax revenue of 600 million yuan.
Qinchu.com news shows that the semiconductor new material manufacturing base project is located in the High-tech Development Zone of Shiyan City, Hubei Province, covering an area of 200 acres. Hubei Guoda New Materials Group Co., Ltd. invested 3.5 billion yuan. It mainly builds quartz crucibles for purification and processing of high-purity quartz.
Manufacturing production lines for semiconductor new material-related products such as the preparation of spherical silica powder for chip packaging, as well as ancillary facilities such as the Semiconductor New Materials Research Institute, the Mineral Materials Testing Center, and the living area for scientific researchers.It is reported that the project will be constructed in two phases, with an investment of 1.5 billion yuan in the first phase, covering an area of 100 acres, and building a fully automated high-purity quartz purification production line with an annual output of 20,000 tons with completely independent intellectual property rights. The second phase investment is 2 billion yuan, covering an area of 100 acres, to build a high-purity quartz purification production line with an annual output of 50,000 tons and a high-purity spherical silica powder production line with an annual output of 50,000 tons for chips. After the project is fully completed and put into operation, it is expected to achieve an annual output value of 6 billion yuan and a tax revenue of 600 million yuan.
He leads a think-tank that calls for tougher measures to prevent Americans technologies from falling into Chinese hands. But he is keenly aware of China’s potential to catch-up in semiconductors and other sectors. What he is simply arguing is that you need to respect your adversary and know yourself (both strength and weakness).
Semitronix newly progress on EDA, Testing equipment and Yield Management.
The company’s progress in new product R&D iterations and market direction mainly includes:
1. Integrated circuit EDA software
-Deeply explore the technical value of integrated circuit yield improvement and launched an efficient process monitoring (PCM) solution. Taking advantage of the synergy between software and hardware, the original yield improvement solution for process development has been expanded and applied to mass production. Currently, the solution has been verified and optimized in multiple production lines, and some production lines have entered application delivery.
-Extended layout manufacturability (DFM) series EDA software to reduce chip development difficulty and manufacturing costs. We independently developed CMP EXPLORER, a modeling tool for the chemical mechanical polishing process. By identifying CMP process hot spots and repairing them in advance, we can achieve design optimization, improve the process yield at the manufacturing end, and reduce yield risks. The software is currently being trialled and introduced in many domestic leading wafer fabs.
-Released the leading one-stop testability (DFT) design solution to further improve the chip yield improvement solution. The solutions launched by the company cover the DFT full-process design tool DFTEXP and related design services, support the DFT design implementation needs of chips and scales in different application fields such as MCU, AI, GPU, Network, 5G baseband, AP, etc., and support In for system-level testing. -System-Test, to support functional safety testing solutions for automotive electronics. In addition, the DFT design tool can synergize and complement the company's existing DE-YMS yield analysis and management system, helping chip design companies reduce costs and increase efficiency when developing products, and more quickly discover faults and trace the root causes of yield.
2. Semiconductor big data analysis and management system
-The existing offline data analysis and management system has gradually entered the business implementation stage. The company has developed technologically advanced semiconductor offline data analysis systems, including semiconductor general analysis tool DE-G, integrated circuit yield analysis and management system DE-YMS, integrated circuit defect management system DE-DMS, and automatic defect classification system DE -ADC and other products have been maturely developed and have entered the stage of market expansion and commercial implementation.
-Continue to extend the layout of the online big data analysis and management system. Based on the data analysis experience of offline data, we continue to expand intelligent online data tools. The company's semiconductor equipment abnormality monitoring and classification system DE-FDC product has completed the first version and has been trialled by customers in wafer factories and packaging and testing plants. stage.
-Artificial intelligence technology assists the iterative upgrade of the company’s intelligent data system. The company uses the independently developed defect automatic classification system DE-ADC based on cutting-edge artificial intelligence vision technology, and expands and extends the development of Inf-AI, a one-stop machine learning platform for semiconductors, to achieve efficient and high-precision classification of wafer defects. The company uses advanced AI models to automatically model and analyze equipment sensor signals, and dynamically updates the model through historical data to capture more types of anomalies, realize automatic feature value control (Feature AutoSpec) changes, and dynamic sensor parameter curves (Raw Trace) It has excellent card control, reduces false alarms, significantly reduces usage and operation and maintenance costs, and can deeply cooperate with DE-DMS, with the ability to continue learning. Currently, the system has been deployed and used by many integrated circuit companies and has been well received by customers.
3. Wafer-level electrical testing equipment
-Optimized and upgraded the new generation of universal high-performance semiconductor parameter testing equipment (T4000 model). The equipment can cover the testing needs of LOGIC, CIS, DRAM, SRAM, FLASH, BCD and other products, and supports the parameter testing of third-generation compound semiconductors (SiC/GaN). The testing efficiency is effectively improved and has a high cost performance. It is suitable for applications in Cost-sensitive compound semiconductor production lines of 8 inches and below.
-Added wafer level reliability (WLR) test equipment category. The company has developed functions such as a reliability test analysis system based on the architecture of the T4000 model WAT test equipment, extending the equipment from WAT testing to WLR and SPICE and other fields. It supports intelligent parallel testing, which can greatly shorten the test time of WLR. At the same time, it can Combined with the customized software system provided by the company to improve user work efficiency.
Huawei mate 60 pro uses （南京芯视界）Visionics’s VI5300 laser autofocus
Huawei’s new Laser Autofocus sourcing for the Mate 60 Pro
Autofocus is indispensable in smartphone photography, and ultra-premium handsets rely on direct time-of-flight (dToF) “laser autofocus” modules to determine the distance to the scene, especially in low-light conditions.
Recently, the Huawei Mate 60 Pro shocked the world by producing an ultra-premium smartphone in spite of trade restrictions. To accomplish this, they were obligated to overhaul their supply chain. Among the changes, Huawei ended its reliance on STMicroelectronics “FlightSense” laser autofocus modules and opted instead for a solution from VisionICs.
This full reverse costing study has been conducted to provide insight into the technology, manufacturing cost and selling price of the VisionICs VI5300 1D dToF Laser Autofocus module in the Huawei Mate 60 Pro.
The module consists of a single-photon avalanche diode (SPAD)-based application specific integrated circuit (ASIC) that contains the dToF histogramming logic and driving logic for the 940 nm vertical cavity light-emitting laser (VCSEL). The design is analogous to that of the STMicroelectronics VL53L0 that it replaced.
A detailed physical analysis, including teardown, cross sectional analysis, circuit delayering, and scanning electron microscopy determines the component structures and technologies. This information is then used to calculate the costs of each production step to provide a detailed cost breakdown of the manufacturing process and estimate the final selling price of the module to Huawei.
We also include a comparison with the STMicroelectronics VL53L0 used in the preceding generations of the Mate/P series.
Huawei’s new Laser Autofocus sourcing for the Mate 60 Pro
Autofocus is indispensable in smartphone photography, and ultra-premium handsets rely on direct time-of-flight (dToF) “laser autofocus” modules to determine the distance to the scene, especially in low-light conditions.
Recently, the Huawei Mate 60 Pro shocked the world by producing an ultra-premium smartphone in spite of trade restrictions. To accomplish this, they were obligated to overhaul their supply chain. Among the changes, Huawei ended its reliance on STMicroelectronics “FlightSense” laser autofocus modules and opted instead for a solution from VisionICs.
This full reverse costing study has been conducted to provide insight into the technology, manufacturing cost and selling price of the VisionICs VI5300 1D dToF Laser Autofocus module in the Huawei Mate 60 Pro.
The module consists of a single-photon avalanche diode (SPAD)-based application specific integrated circuit (ASIC) that contains the dToF histogramming logic and driving logic for the 940 nm vertical cavity light-emitting laser (VCSEL). The design is analogous to that of the STMicroelectronics VL53L0 that it replaced.
A detailed physical analysis, including teardown, cross sectional analysis, circuit delayering, and scanning electron microscopy determines the component structures and technologies. This information is then used to calculate the costs of each production step to provide a detailed cost breakdown of the manufacturing process and estimate the final selling price of the module to Huawei.
We also include a comparison with the STMicroelectronics VL53L0 used in the preceding generations of the Mate/P series.