Kezhicheng Third Generation Semiconductor Achieves Mass Delivery of Functionalized Diamond Heat Dissipation Substrate for Advanced AI Chips
Henan, China – Kezhicheng Third Generation Semiconductor Carbon-Based Chip Co., Ltd. has announced a significant milestone in the domestic semiconductor supply chain: its independently developed functionalized diamond heat dissipation substrate has achieved mass delivery at the research and development (R&D) level and has been officially adopted by a top domestic microelectronics packaging research institute.
This new material solution is specifically designed to support the advanced packaging R&D of AI computing chips, particularly those utilizing Chiplet architectures and 2.5D/3D stacking technologies. As China accelerates its development in high-end semiconductors, this achievement marks a critical step toward solving the thermal management bottlenecks associated with domestically produced advanced packaging.
The surge in multi-chip integration and high-density packaging has led to a dramatic increase in local heat flux density within single chips. Consequently, hotspot temperatures and thermal gradients have intensified significantly. Traditional cooling materials, such as copper-based substrates and aluminum nitride ceramics, are approaching their physical limits in terms of thermal conductivity. This limitation often results in:
- Localized overheating.
- Operational frequency reductions.
- Reliability issues including electromigration and thermal fatigue within interconnect structures.
To address these challenges, Kezhicheng leverages its proprietary capabilities in large-scale Microwave Plasma Chemical Vapor Deposition (MPCVD) diamond deposition, ultra-thin precision grinding, and integrated metallization processes to create a functionalized diamond heat dissipation substrate.
- Superior Thermal Conductivity: Stable thermal conductivity exceeding 1300 W/(m·K), facilitating rapid heat diffusion from localized hotspots and effectively reducing peak temperatures (intrinsic diamond conductivity can exceed 2000 W/(m·K)).
- Thermal Expansion Matching: The substrate's coefficient of thermal expansion is closely matched to silicon, minimizing thermal stress during packaging. This ensures superior flatness, roughness control, and bonding precision.
- Process Compatibility: It is fully compatible with complex advanced packaging processes such as flip-chip packaging and interposer integration.
Joint testing conducted with research institutions confirmed that the diamond substrate significantly reduces chip hotspot temperatures and improves overall thermal gradients. This optimization helps mitigate risks of interface delamination and solder joint failure during thermal cycling, thereby enhancing the stability and long-term reliability of chips under full-load conditions.
The product is now applicable to various R&D verification scenarios, including AI accelerator chips and High-Performance Computing (HPC) chips, helping to shorten development cycles for new packaging architectures.
This batch delivery represents a new milestone in the industrialization of diamond thermal management materials by Kezhicheng. The company has established an independent R&D ecosystem covering deposition, growth, machining, and packaging adaptation, allowing for customized solutions tailored to specific advanced packaging needs.
The product is now applicable to various R&D verification scenarios, including AI accelerator chips and High-Performance Computing (HPC) chips, helping to shorten development cycles for new packaging architectures.
This batch delivery represents a new milestone in the industrialization of diamond thermal management materials by Kezhicheng. The company has established an independent R&D ecosystem covering deposition, growth, machining, and packaging adaptation, allowing for customized solutions tailored to specific advanced packaging needs.
