Chinese semiconductor thread II
- Thread starter vincent
- Start date
Correction: 中信建投 =/= CITIC but China Securities Co.
I would generally avoid referencing these Wechat 段子 as many are often fake news esp. given this is not even first hand sent from the analyst.
Looking back now, some people's insider news was just more accurate than others.
I checked just now, that original 段子 was available online as recent as May 20th.
Heat signature is almost the same as 2D chip.
Jiaocheng Ultrasonic Builds Audio Defense Line for Advanced Packaging Defect Detection
In the post-Moore's Law era, artificial intelligence computing power has grown explosively. 2.5D and 3D advanced packaging technologies have become essential for overcoming chip performance limitations and enabling mass production of high-performance computing chips, AI processors, and high-bandwidth memory. However, these sophisticated packaging methods involve multi-layer stacked structures, micro-pitch interconnects, and heterogeneous material interfaces. This complexity creates micron-level defects such as bubbles, delamination, cracks, and foreign particles that act as invisible threats to manufacturing yield. If these defects are not identified early in production, product yields become difficult to guarantee.
Ultrasonic testing technology, also known as Scanning Acoustic Microscopy or SAM, offers a powerful solution. This technique works like a microscopic ultrasound scan for chips. A high-frequency ultrasonic probe emits waves that travel through deionized water into the chip package. When these waves encounter different materials or defects like air gaps, they reflect back with varying intensity and timing. By analyzing these reflections, the system can reconstruct detailed two-dimensional and three-dimensional images of the chip's internal structure.
This approach provides four significant advantages for advanced packaging inspection. First, it enables completely non-destructive testing with no contact damage to valuable chips. Second, it offers deep imaging capability that penetrates silicon, glass, and molding compounds to inspect entire stacked layers. Third, it demonstrates exceptional sensitivity to air gaps, detecting micron-sized bubbles and delamination that optical and X-ray methods often miss. Fourth, it supports high-efficiency mass production with compatibility for standard wafer sizes and fully automated online testing.
Shanghai Jiaocheng Ultrasonic Technology Company has developed a comprehensive range of ultrasonic scanning equipment designed for advanced packaging applications. Their Wafer400 series addresses wafer-level processes, while the Panel600 series serves panel-level packaging needs.
The Wafer400-F2 model supports die-to-wafer processes with an automatic wafer flipping mechanism that enables non-contact backside scanning, protecting chip surfaces from water exposure. The Wafer400-A is designed for wafer-to-wafer bonding applications, particularly suited for HBM and 3D stacking processes, with flexible probe selection for detecting bonding interface defects. The standard Wafer400 serves research, development, and pilot production needs with semi-automatic operation. The Panel600 accommodates various panel sizes for panel-level packaging and supports both reflection and transmission scanning modes. The US300 provides an offline manual option for laboratory research and small-batch production.
Ultrasonic testing technology, also known as Scanning Acoustic Microscopy or SAM, offers a powerful solution. This technique works like a microscopic ultrasound scan for chips. A high-frequency ultrasonic probe emits waves that travel through deionized water into the chip package. When these waves encounter different materials or defects like air gaps, they reflect back with varying intensity and timing. By analyzing these reflections, the system can reconstruct detailed two-dimensional and three-dimensional images of the chip's internal structure.
This approach provides four significant advantages for advanced packaging inspection. First, it enables completely non-destructive testing with no contact damage to valuable chips. Second, it offers deep imaging capability that penetrates silicon, glass, and molding compounds to inspect entire stacked layers. Third, it demonstrates exceptional sensitivity to air gaps, detecting micron-sized bubbles and delamination that optical and X-ray methods often miss. Fourth, it supports high-efficiency mass production with compatibility for standard wafer sizes and fully automated online testing.
Shanghai Jiaocheng Ultrasonic Technology Company has developed a comprehensive range of ultrasonic scanning equipment designed for advanced packaging applications. Their Wafer400 series addresses wafer-level processes, while the Panel600 series serves panel-level packaging needs.
The Wafer400-F2 model supports die-to-wafer processes with an automatic wafer flipping mechanism that enables non-contact backside scanning, protecting chip surfaces from water exposure. The Wafer400-A is designed for wafer-to-wafer bonding applications, particularly suited for HBM and 3D stacking processes, with flexible probe selection for detecting bonding interface defects. The standard Wafer400 serves research, development, and pilot production needs with semi-automatic operation. The Panel600 accommodates various panel sizes for panel-level packaging and supports both reflection and transmission scanning modes. The US300 provides an offline manual option for laboratory research and small-batch production.
Jiaocheng Ultrasonic has built a complete research and development team spanning acoustics, mechanics, electrical engineering, software, and algorithms. The company has achieved full-stack self-developed capabilities in high-frequency probes, pulse generators, high-speed data acquisition, precision motion control, and artificial intelligence algorithms, breaking previous overseas technology monopolies.
To address efficiency challenges in high-volume manufacturing, the company developed a dual-station scanning platform where two probes operate independently but simultaneously on the same wafer, automatically merging images to double inspection throughput. To handle wafer warpage issues that can interfere with scanning accuracy, Jiaocheng created a Real-Time Auto Focus function. This system uses fast focusing algorithms and precise Z-axis adjustments to dynamically maintain optimal probe focus regardless of sample surface variations.
As advanced packaging technology continues evolving, ultrasonic testing is increasingly incorporating artificial intelligence for smarter defect recognition. Jiaocheng Ultrasonic has developed proprietary defect identification algorithms based on deep learning. Their end-to-end semantic segmentation model analyzes each defect instance, extracts characteristics such as shape and position, and classifies defect types including bubbles, chipping, cracks, and foreign matter. This approach delivers pixel-level segmentation accuracy and improved classification performance for complex defect scenarios.
Looking ahead, Jiaocheng Ultrasonic plans to continue advancing ultrasonic testing technology while collaborating with industry partners to drive the semiconductor packaging sector forward. With SEMI-certified equipment and systematic innovation across multiple technical domains, the company is establishing itself as a benchmark for domestically produced ultrasonic inspection solutions, helping ensure yield and reliability for next-generation chip manufacturing in the AI computing era.
To address efficiency challenges in high-volume manufacturing, the company developed a dual-station scanning platform where two probes operate independently but simultaneously on the same wafer, automatically merging images to double inspection throughput. To handle wafer warpage issues that can interfere with scanning accuracy, Jiaocheng created a Real-Time Auto Focus function. This system uses fast focusing algorithms and precise Z-axis adjustments to dynamically maintain optimal probe focus regardless of sample surface variations.
As advanced packaging technology continues evolving, ultrasonic testing is increasingly incorporating artificial intelligence for smarter defect recognition. Jiaocheng Ultrasonic has developed proprietary defect identification algorithms based on deep learning. Their end-to-end semantic segmentation model analyzes each defect instance, extracts characteristics such as shape and position, and classifies defect types including bubbles, chipping, cracks, and foreign matter. This approach delivers pixel-level segmentation accuracy and improved classification performance for complex defect scenarios.
Looking ahead, Jiaocheng Ultrasonic plans to continue advancing ultrasonic testing technology while collaborating with industry partners to drive the semiconductor packaging sector forward. With SEMI-certified equipment and systematic innovation across multiple technical domains, the company is establishing itself as a benchmark for domestically produced ultrasonic inspection solutions, helping ensure yield and reliability for next-generation chip manufacturing in the AI computing era.
SmartSens and Unisoc jointly develop high-speed optical interconnects for MicroLEDs, laying a solid foundation for domestic AI computing power.
SmartSens and Unisoc have formed a strategic partnership to develop next-generation MicroLED high-speed optical interconnect solutions. By combining SmartSens' optical design expertise with Unisoc's proficiency in AI processors and high-speed interfaces, the collaboration aims to deliver high-bandwidth, low-power core solutions specifically tailored for domestic AI computing clusters.
The joint initiative leverages MicroLED co-packaged optoelectronics (CPO) to address the explosive data transmission demands of modern AI data centers. Instead of relying on traditional copper cables, this technology employs a parallel architecture that utilizes hundreds of low-speed optical channels. This deep integration of the optical engine directly with the computing chip effectively resolves longstanding industry pain points regarding high costs and low integration, while drastically reducing unit transmission energy consumption to just five percent of traditional copper-based solutions.
Beyond immediate technological breakthroughs, this collaboration is strategically designed to accelerate the mass production and commercialization of domestic optical interconnects across a wide array of demanding sectors, including AI data centers, intelligent assisted driving, and industrial robotics. By leveraging their extensive, pre-existing industry ecosystems and massive customer bases, SmartSens and Unisoc will work closely with upstream and downstream supply chain partners to build robust, independent industrial barriers. Ultimately, this powerful synergy not only enhances the global competitiveness of the local semiconductor and optoelectronic industries, but it also injects vital, homegrown chip power into the future expansion of artificial intelligence infrastructure, ensuring the high-quality, sustainable development of the broader digital economy.
Beyond immediate technological breakthroughs, this collaboration is strategically designed to accelerate the mass production and commercialization of domestic optical interconnects across a wide array of demanding sectors, including AI data centers, intelligent assisted driving, and industrial robotics. By leveraging their extensive, pre-existing industry ecosystems and massive customer bases, SmartSens and Unisoc will work closely with upstream and downstream supply chain partners to build robust, independent industrial barriers. Ultimately, this powerful synergy not only enhances the global competitiveness of the local semiconductor and optoelectronic industries, but it also injects vital, homegrown chip power into the future expansion of artificial intelligence infrastructure, ensuring the high-quality, sustainable development of the broader digital economy.
Muxi Technology partners with MyFT to enable large-scale deployment of enterprise-level AI agents using domestically produced GPUs.
On May 22, Muxi Technology and MyFT signed a strategic cooperation agreement to enable the large-scale deployment of enterprise-level AI agents using domestically produced computing power. This marks a significant step in moving China's domestic GPU infrastructure from "usable" to "mass application."
- Collaboration Scope: The two companies will jointly develop computing infrastructure, intelligent agent platforms, and industry-specific solutions.
- Hardware Support: Muxi Technology will provide computing power based on its XiYun C600 series general-purpose GPUs. These chips have achieved full-process localization, capable of handling large-scale model training and multi-scenario adaptation.
- Platform Integration: MyFT's "AI-Agentforce" platform will be deployed using Muxi's hardware to serve various industry scenarios.
The integrated solution aims to transform computing power into practical applications in sectors including:
- Government investment promotion
- New energy customer operations
- Retail consumption
- Cultural tourism services
Muxi Technology's Chairman, Chen Weiliang, emphasized that this partnership supports the "Digital China" initiative by creating a secure, domestic high-performance computing network to empower thousands of industries.
This collaboration aligns with recent national directives:
This collaboration aligns with recent national directives:
- "1+6+X" Framework: Muxi is actively expanding its digital ecosystem across finance, healthcare, energy, education, transportation, and entertainment, while exploring emerging fields like embodied intelligence and the low-altitude economy.
- New Policy Guidance: In May, Chinese regulators (CSA, NDRC, MIIT) issued opinions on standardized AI agent application, emphasizing compatibility with open-source chips and operating systems. The partnership directly addresses this by demonstrating a viable ecosystem for domestic hardware in enterprise AI.
The deal represents a pivotal milestone where domestic computing power is no longer just experimental but is being successfully integrated into the commercial deployment of advanced AI agents across multiple industries, reinforcing China's push toward technological sovereignty and "AI+" initiatives.