Chinese semiconductor thread II
- Thread starter vincent
- Start date
Exactly , seems some in china dont realise yet, anything remotely Chinese now is a no go area in washington . Lol
A new factory in Suzhou producing high-end domestic equipment has started production.
Suzhou Yuantuo Vacuum Technology Co., Ltd., founded in 2024, has officially begun production at its new factory in Xiangcheng District, Suzhou, Jiangsu Province. The facility focuses on mass-producing and verifying 12-inch magnetron sputtering equipment for semiconductor thin-film deposition a critical high-end technology.
The company, which has achieved independent R&D and surpassed international competitors in technical stability and performance, is now the first domestic firm to fully localize core process thin-film deposition equipment. It has already delivered bulk orders to major semiconductor companies.
With expected annual output exceeding 70 million yuan by 2026, the project strengthens China’s self-reliance in semiconductor equipment, supports national supply chain security, and boosts Xiangcheng District's economic development. The success is attributed to Suzhou’s strong innovation ecosystem, including full-process support from Suzhou Innovation Investment Group and strategic partnerships.
The company won second place in the 2025 "Win in Suzhou" global entrepreneurship competition and secured a Series A financing round led by China Development Bank Financial Leasing, with co-investment from Suzhou Innovation Investment Group. At the commissioning ceremony, Yuantuo signed cooperation agreements with Jiangsu Bank, China Merchants Bank, and Suzhou Rural Commercial Bank to accelerate growth.
This milestone marks a significant step toward domestic leadership in advanced semiconductor equipment manufacturing.
The company, which has achieved independent R&D and surpassed international competitors in technical stability and performance, is now the first domestic firm to fully localize core process thin-film deposition equipment. It has already delivered bulk orders to major semiconductor companies.
With expected annual output exceeding 70 million yuan by 2026, the project strengthens China’s self-reliance in semiconductor equipment, supports national supply chain security, and boosts Xiangcheng District's economic development. The success is attributed to Suzhou’s strong innovation ecosystem, including full-process support from Suzhou Innovation Investment Group and strategic partnerships.
The company won second place in the 2025 "Win in Suzhou" global entrepreneurship competition and secured a Series A financing round led by China Development Bank Financial Leasing, with co-investment from Suzhou Innovation Investment Group. At the commissioning ceremony, Yuantuo signed cooperation agreements with Jiangsu Bank, China Merchants Bank, and Suzhou Rural Commercial Bank to accelerate growth.
This milestone marks a significant step toward domestic leadership in advanced semiconductor equipment manufacturing.
Jiangsu Province releases list of major projects: 100 semiconductor projects from companies including Huatian, Changjiang Electronics, and Huahong are included.
Jiangsu Province officially released its list of major projects for 2026, including over 100 semiconductor-related initiatives from leading companies such as Huatian Technology, Changjiang Electronics, and Huahong Group. These projects span the full semiconductor industrial chain wafer manufacturing, advanced packaging and testing, key materials, and core equipment.
The province plans to launch 670 major projects in 2026, with a total annual investment of 664.6 billion yuan (an increase of 12 billion yuan year-on-year), maintaining both scale and investment intensity. Of these, 414 are industrial projects accounting for over 75% of implementation plans—with a planned investment of 295 billion yuan. Semiconductor projects are heavily concentrated in strategic emerging industries, particularly next-generation information technology.
Geographically, the semiconductor cluster follows a "southern Jiangsu as the core, Yangtze River region as the backbone, northern Jiangsu as supplementary" layout. Nanjing, Wuxi, Jiangyin, and Yixing have become key hubs for project concentration, strengthening regional industrial clustering.
- Huatian Technology: Two projects in Nanjing—advanced packaging and testing, including a world-first fully automated board-level fan-out packaging line expected to go live in 2026.
- Changjiang Electronics: Jiangyin’s high-density 3D IC project focusing on 2.5D/3D wafer-level packaging for applications in AI, 5G, and automotive electronics.
- Huahong Group: The second phase of its Wuxi Fab9 (12-inch fab) is progressing, aiming for full production by mid-2026 with a monthly capacity of 83,000 wafers.
- Materials & Equipment: Projects in Yixing, Wuxi, Suzhou, and Yangzhou cover critical areas like lithography materials, semiconductor equipment, and automotive-grade power semiconductors.
Rarefied gas simulation in the dynamic gas lock of EUV lithography: A comparative study of DSMC, ESBGK, ESBGK-DSMC, and ESFP method
Abstract
The dynamic gas lock (DGL) in extreme ultraviolet lithography (EUVL) is conventionally simulated using the Direct Simulation Monte Carlo (DSMC) method, which, despite its high fidelity, suffers from prohibitive computational cost. This study aims to address this challenge by comparing the performance of four rarefied gas simulation methods—DSMC, ESBGK, ESBGK–DSMC, and ESFP—in terms of both accuracy and computational efficiency. For multicomponent, polyatomic gas flows under rarefied and non-equilibrium conditions, the transport coefficients in the ESBGK method were evaluated using both Wilke's mixing rule and collision integrals. Results show that, relative to the DSMC benchmark, the ESBGK–DSMC hybrid method achieves the closest agreement, with an average deviation of 1.52 % in suppression rate, while improving computational efficiency by a factor of 4.5. The standalone ESBGK(Collint) and ESBGK(Wilke) models exhibit average deviations of 3.53 % and 1.79 %, respectively, in suppression rate relative to the DSMC benchmark. Both, however, achieve an identical improvement in computational efficiency, being approximately 4.6 times faster than DSMC. In the ESBGK method (Collint and Wilke), the transport coefficients of the gas mixture show close agreement with benchmark values for the bulk carrier gas; however, for trace species with low molar fractions, sensitivity to collisional kinetics causes more pronounced deviations. From a temperature perspective, deviations at the connection between the DGL and POB are 0.08 % for the clean gas and 0.37 % for the contaminant. In contrast, the ESFP method shows major deviations in multicomponent systems, reaching 190.5 %.
Dwell time calculation and curvature effect compensation method of magnetorheological finishing for large-aperture aspheric optics.
Abstract
Aspheric optics are widely utilized in high-performance optical systems due to superior properties. The fabrication of projection objectives for extreme ultraviolet lithography (EUVL) imposes extremely stringent requirements on surface accuracy, yet the ultraprecision machining of aspheric optics remains a fundamental challenge in optical manufacturing. Magnetorheological finishing (MRF), characterized by high material removal efficiency, minimal subsurface damage, and excellent surface error convergence ability, has become a key technology of optical manufacturing. However, largeaperture aspheric optics significantly increase the number of trajectory points, and the polishing paradigm based on a constant tool influence function (TIF) fails to accommodate the complex curvature distribution of aspheric optics. This instability in the TIF leads to large-scale and ill-conditioned dwell time computation, which severely constrain manufacturing accuracy and consistency. Based on the characteristics of MRF process and the principles of fluid mechanics, this paper analyzes the TIF model for aspheric surfaces in MRF, and compensates the curvature effect of aspheric surface based on point-by-point adaptive compensation method. Through the theoretical model, the curvature of the dwell point is solved point by point and the global spherical mapping is realized, which avoids the local fitting error and significantly improves the compensation efficiency and accuracy. Based on the solution method of linear equations of dwell time, a splicing removal efficiency matrix construction model is established and converted into a C language package, which significantly expands the computational scale and improves solution efficiency. Finally, the simulation experiment is conducted on an aspheric mirror with an aperture of 300mm×300mm and a conic constant of -15.6. The results demonstrate that the root mean square (RMS) of the surface error is reduced from 98.53nm to 0.96nm, thereby verifying the applicability of the proposed method in high-precision aspheric polishing, and provides an effective technical path for the ultra-precision manufacturing of aspheric lenses in the EUVL system. |
Qwen team and T-Head are deeply integrating their models with the RISC-V architecture that Xuantie series of cores implement.
Electrostatic chuck manufacturer Junyuan Electronics completes its Series C+ funding round.
Junyuan Electronics, a leading Chinese manufacturer of electrostatic chucks (ESCs) core components in semiconductor equipment like etching machines and CVD systems has completed its Series C+ funding round. The company is now based in the Optics Valley Chip Technology Industrial Park, Wuhan.
Previously backed by prominent investors including Stone Creek Capital, Shenzhen Heavy Investment Group, Huahong Hongxin, Xinlian Fund, and Tuojing Yanquan, Junyuan has built full-process capabilities from R&D to mass production of ESCs. Its products serve major domestic semiconductor manufacturers in 12-inch and 8-inch wafer processes, covering key equipment for 14nm and above nodes.
With a market value share of ~16% in semiconductor equipment parts (second only to robotic arms and vacuum pumps), the global ceramic ESC market is forecasted to reach $2.424 billion by 2030 (CAGR: 4.99%).
In April last year, Junyuan signed a cooperation agreement with Wuhan East Lake High-tech Development Zone to establish an ESC production and repair facility in Optics Valley, reinforcing its role in supporting local semiconductor industry growth.
Previously backed by prominent investors including Stone Creek Capital, Shenzhen Heavy Investment Group, Huahong Hongxin, Xinlian Fund, and Tuojing Yanquan, Junyuan has built full-process capabilities from R&D to mass production of ESCs. Its products serve major domestic semiconductor manufacturers in 12-inch and 8-inch wafer processes, covering key equipment for 14nm and above nodes.
With a market value share of ~16% in semiconductor equipment parts (second only to robotic arms and vacuum pumps), the global ceramic ESC market is forecasted to reach $2.424 billion by 2030 (CAGR: 4.99%).
In April last year, Junyuan signed a cooperation agreement with Wuhan East Lake High-tech Development Zone to establish an ESC production and repair facility in Optics Valley, reinforcing its role in supporting local semiconductor industry growth.
Peifengtu moved south to Shanghai and changed its name, taking the localization of EDA software as its mission.
According to its official website, Peifeng Tunan's mission is to localize EDA software for integrated circuit manufacturing. The founding team began developing TCAD software in 2007. After 17 years of investment and ten iterations, Peifeng Tunan launched Mozz TCAD, a 3D process and device simulation software suite. Commercial customers have verified that Mozz TCAD has achieved comprehensive compatibility with international benchmark software and has significantly surpassed it in some application scenarios.
Peifeng Tunan's full range of manufacturing EDA software products covers Optical Proximity Correction (OPC), Process Device Simulation (TCAD), 3D Surface Structure Simulation (ProcEmu), TCAD-SPICE rapid modeling, circuit simulation, and parasitic parameter extraction, forming the industry's most complete toolchain for Design-Process Co-optimization (DTCO).
As one of the earliest technology pioneers in China to develop EDA software based on independent intellectual property rights, the company's founding team has always adhered to independent technological innovation and actively built an intellectual property protection system to ensure the independent controllability of source code.
The composed presence of Chinese equipment manufacturers always helps alleviate the anxiety of Chinese companies facing external blockades, supply disruptions, and suppression .
AMEC's 5nm etching equipment has passed certification by major domestic memory chip manufacturers; its HBM- specific equipment has been delivered to SK Hynix's Wuxi plant. By 2025 , AMEC's 3nm etching machines will not only be adopted by TSMC but also secure orders from Samsung. More importantly, the localization rate of AMEC's etching equipment components has increased from less than 30% in the early stages to 80% , and is expected to achieve 100% self-sufficiency in the future. Since the beginning of this year , AMEC has obtained 149 new patent authorizations , an increase of 49% compared to the same period last year . Currently, after its rapid expansion, AMEC has invested in about 30 companies.
ACM Shanghai has established a platform-based semiconductor process equipment layout, with technological capabilities comparable to leading US companies. In the field of integrated circuit wet cleaning equipment, it has achieved comprehensive coverage of over 95% of cleaning processes, becoming the semiconductor equipment company with the most complete cleaning product line globally. More than 100 SAPS machines have been deployed on mass production lines of multiple clients, helping to improve product yield by 5%-10% . In the field of horizontal electroplating, ACM Shanghai is one of the world's three largest manufacturers of mass-produced electroplating equipment, the other two being from the United States. As of June this year, the cumulative shipment of front-end and back-end electroplating machines has reached 1,500 cavities, covering front-end, mid-end, back-end, and 3D processes. With advanced packaging shifting towards large-size panel-level technology, ACM Shanghai's electroplating equipment has innovatively overcome the challenges of the FOPLP process and won the US 3D InCites " Technology Enablement Award ".
Topwin Technology's PECVD equipment, as the company's core product, has achieved full coverage of PECVD dielectric thin film materials. Its 14nm SACVD equipment has successfully replaced Application Materials at SMIC, achieving a breakthrough for domestically produced material equipment from "having" to "excellent." The company's thin film equipment product matrix includes PECVD , ALD , SACVD , HDPCVD , and Flowable CVD series.
Yitang Semiconductor has established three core equipment product lines : etching, thin film deposition, and rapid thermal processing. It is an integrated circuit equipment company capable of mass-producing single-wafer rapid thermal processing equipment . In the dry etching field, it ranks among the top ten globally in market share. Its core technologies related to plasma sources and wafer surface treatment have also sparked a legal dispute with Applied Materials regarding the illegal acquisition and use of these technologies. Yitang has provided evidence demonstrating that it possesses leading original technological capabilities in this field and owns related trade secrets.
In terms of materials , Shanghai Silicon Industry's 300mm silicon wafers have reached nearly 40 % usage among leading domestic wafer manufacturers , with a yield rate exceeding 90% , and a matching rate of over 75% with Shanghai Microelectronics' lithography machines . Nanda Optoelectronics' photoresist has secured 40% of orders from top domestic production lines , and its capacity is expected to expand to 650,000 wafers / month by 2025 , meeting 22% of domestic demand.
There are countless domestic equipment and material suppliers to mention. For example, the global high-end wafer flatness measurement market, long dominated by American and Japanese manufacturers, has been broken by the first wafer flatness measurement equipment independently developed by Zhongke Feice . This equipment has already been officially shipped to HBM (High Bandwidth Memory) clients . In addition, JCET and Tongfu Microelectronics are also installing domestically produced high-speed flip chip placement machines in large quantities on their HBM packaging production lines.