Nope...the EUV machine itself is more expensive but by reducing the number of steps in the fabrication work flow it actually makes operation costs cheaper, and improves your per unit manufacturing costs. The primary increased cost driver is specific to the node shrink, not the equipment. A 7nm fabrication process with EUV is going to be cheaper than one with DUV.
Chinese semiconductor industry
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Depends. Power output of EUV light sources is significantly lower than that of DUV and reflective losses in the optics are greater, so you could require longer exposure times.
EUV throughput is worse than that of DUV, the cost of the mask is much higher, the photoresist is much more expensive, I believe that the machine cannot be used as much as DUV because the high energy of the light wears the machine down ( 14nm instead of 193nm), I think there is no great economic benefit in more mature nodes. The EUV sales point is not as a DUV replacement but a machine to make the next generation of Gate All Around transistors, print the most critical layers with EUV and return to Arf DUV and Krf DUV.
My point is that in terms of transistor cost, is 28nm DUV actually cheaper than 7nm EUV?
If 28nm has the lowest cost per transistor, there's no need for 7nm for all sorts of applications.
Consider how all the manufacturers of Flash Memory are sticking with 28nm processes, because it doesn't make any sense to go smaller.
antiterror13
Brigadier
Yeapp, true. The better metrics is millions transistors per mm2 .. and Intel 10nm actually better than the early 7nm TSMC
Yes, but multipatterning increases the steps in your workflow by a multiple of the number of extra exposures you need. Since each wafer needs multiple exposures even at single patterning the number of extra steps and the time cost per unit production of each quickly pile up. That’s a much bigger time cost than longer exposures on lower photon output light sources, and that’s going to reflect greatly in your per unit costs.
If switching to EUV didn’t help with unit economics TSMC and Samsung wouldn’t have developed more EUV intensive 7nm fab lines from their DUV lines. Multipatterning is a much worse tradeoff than the cost of an EUV machine and longer exposure times. These companies switched to EUV fabs for sub 10 process nodes that they could already do with DUV for a reason.
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There are applications where you want to be on smaller nodes.
So we can see EUV is mainly being used on logic chips which only require an average maximum of 30% CPU utilisation (thermal output) at any time.
But for other purposes (such as datacentre chips running 100%, memory, ASICs, etc) - I suspect it is cheaper to stick with 14/28nm nodes
I’m not arguing every application should be moved to cutting edge nodes. I’m simply pointing out that the primary cost drivers for advanced nodes aren’t with the EUV specific equipment, but the nodes themselves. What’s predominantly driving increased costs at smaller nodes is more stringent design, fabrication, and testing tolerances. Your tolerance margin for smaller nodes is much less forgiving than for larger nodes. This is especially the case as continued shrinks in geometry impose much more complex structures at much smaller scales just to get around quantum limitation effects. Remove EUV out of the equation, go to an all DUV process, and you will end up with the same cost growth trends but at a higher price level, because none of the tolerance impacts will have changed, while your entire fabrication process will have become more tedious and expensive.
Depends. Front end processes you can use EUV on but metallization layers can be done with DUV. So it's not really doubling all steps, it is just doubling the steps that would have otherwise used EUV.
You also need specialized hardcoat resists for EUV due to the fact that typical polymeric resists don't have the resolution required (photoacid diffusion, secondary electron generation). That's an entire new supply chain and cost contributor that would not have otherwise been there. So EUV might not be as decisive as originally envisioned.
Speaking of thermal output, transistors per mm2 is likely to be a less and less relevant metric as time goes on because of the dark silicon problem. Without solving this problem the end performance will just hit a brick wall.
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