Chinese semiconductor industry

Status
Not open for further replies.
FairAndUnbiased

FairAndUnbiased

Brigadier
Registered Member
caudaceus said:
Looking at the chart, the biggest cost hike is the software?
Click to expand...
that is the cost to fabless companies. My guess for the software is the engineering time it costs to develop a design tool for the chip such as a driver and programming environment i.e. MBED for many ARM embedded chips.

Please, Log in or Register to view URLs content!
Wafer went from $9.3k USD at 7 nm to $16.9k at 5 nm (82% increase in cost). I don't know how they arrived at the per chip cost, especially since they don't seem to claim different die size or yield. However, from my understanding orders are placed on a wafer start basis, so cost per wafer is what matters to the buyers.
 
FairAndUnbiased

FairAndUnbiased

Brigadier
Registered Member
tokenanalyst said:
View attachment 76602
Not just software but also fab companies. Every single less competitor is an increase in fabrication prices.
Click to expand...

looks like the key chokepoints where lots of players drop out are 90 nm (high K dielectric, metal gate, ALD), 65 nm (ArF lithography), 28 nm (immersion lithography), 14 nm (FinFET) and 10 nm (EUV).

GodRektsNoobs said:
Why isn't Huahong in this graph? They have reached 14nm, right?
Click to expand...
HLMC is Huahong.
 
A

antiterror13

Brigadier
horse said:
Yeah brother, new materials are the key for the future of the Chinese IC.

The engineering for the current 5nm then 3nm, is massive.

Too massive. That can only be done with over-engineering the current methods.

I'm not an engineer, but over-engineering is no different than anything else in life.

When we get to that point, we all know, that situation has reached its limits, and time for something new.

TSMC can put all its efforts to over-engineering the 7nm to 5nm then 3nm.

China should put all its efforts to figure out a new way of doing it.

Then SMIC talks to TSMC saying they will not wipe them out if they develop new materials and if they continue selling their stuff, out in the open for through the Ho Chi Min Trail.

:oops:
Click to expand...

And TSMC owns something like 10% of SMIC anyway
 
A

ansy1968

Brigadier
Registered Member
First the delay of 3nm production then this hiccup in construction of the FAB 21 in Arizona with associated cost and other problems like sourcing of water. The date of completion will surely be affected instead of 2024 maybe in 2026? Boy god blessing surely shine on China even though she is an atheist...LOL

Please, Log in or Register to view URLs content!


Please, Log in or Register to view URLs content!




Please, Log in or Register to view URLs content!

663 views43 minutes ago

CC
 
BoraTas

BoraTas

Major
Registered Member
ZeEa5KPul said:
Now this is a very interesting discussion. @BoraTas, where are the values for the surface roughness of the optics coming from? I couldn't find them in the links you provided. A parameter I ran into in my casual reading about EUV optics is "mirror wavefront aberration" - and that usually given as RMS (I believe that means root mean square). Do you know how that relates to the measures you're using?

There seems to be a critical value for that parameter which is λ/30 where λ is the wavelength of light (13.5nm in the case of EUV). The value for a full-fat EUV (below 7nm) is 0.45nm RMS. CIOMP demonstrated a 0.75nm RMS machine in 2017, which can do features 22nm-32nm.

I think the best means we have of broadly estimating progress without getting too deep into the technical weeds is comparing milestones. ASML had similar machines to the CIOMP demonstrator in 2013, so it's roughly 4 years ahead of China. Since it delivered the EUV to TSMC in 2019, we can extrapolate a 2023-2024 delivery date for a device similar to the NXE3400 in China. This matches up nicely with the estimates we have.
Click to expand...
The said numbers are on the 24th page of the first link. They are definitely referring to the defects on the mirror itself.
 
ZeEa5KPul

ZeEa5KPul

Colonel
Registered Member
BoraTas said:
The said numbers are on the 24th page of the first link. They are definitely referring to the defects on the mirror itself.
Click to expand...
Those values might be aspirational, it's difficult to tell exactly from the slides. They mention "high NA", which I take to mean 0.55NA - the current state of the art machine (NXE:3400C) has 0.33NA optics.
 
Status
Not open for further replies.
Top