Chinese semiconductor industry

Status
Not open for further replies.
T

Tam

Brigadier
Registered Member
ansy1968 said:
To the experts what is the significant of this breakthrough?

from CnTechPost

Loongson unveils in-house developed instruction set architecture LoongArch in historic breakthrough​

Please, Log in or Register to view URLs content!
April 15, 2021
Chinese chip maker Loongson Technology on Thursday
Please, Log in or Register to view URLs content!
its fully in-house developed instruction set architecture, Loongson Architecture, or LoongArch, marking a major milestone for the Chinese IC industry.
Please, Log in or Register to view URLs content!
was previously one of the key proponents of the MIPS instruction system. The move making it the latest company to abandon MIPS after Wave Computing's move to the RISC-V camp.
Loongson unveils in-house developed instruction set architecture LoongArch in historic breakthrough-CnTechPost

Loongson commissioned LoongArch to be evaluated by a leading third-party IP evaluator. Beginning in the second quarter of 2020, the parties invested hundreds of people in an in-depth comparative analysis of LoongArch against information and tens of thousands of patents related to major international instruction systems such as ALPHA, ARM, MIPS, POWER, RISC-V, and X86.
In January 2021, the evaluation organization concluded that LoongArch has designed its own instruction system design, instruction format, instruction encoding, and addressing modes.

The LoongArch instruction system manual is significantly different from the major international instruction systems mentioned above in terms of chapter structure, instruction description structure, and instruction content presentation.
The LoongArch infrastructure has not identified any risk of infringement of Chinese patents on the above-mentioned major international instruction systems, the evaluation concluded.
The CPU instruction system is the hardware and software interface of a computer, and is the specification of the binary coding format of the software instructions executed by the CPU.

At present, the most well-known ones are the x86 instruction system based on the Wintel ecosystem and the ARM instruction system based on the Android operating system.
Both the x86 and ARM instruction systems need to be "licensed" in order to develop CPUs compatible with them, and it is possible to develop products using licensed instruction systems, but it is not possible to form an autonomous industrial ecosystem.

RISCV is a completely open source instruction system, but it comes from the University of Berkeley. Therefore, Loongson Architecture is a historical breakthrough for the Chinese IC industry.
The CPUs developed by Loongson since 2020 all support the LoongArch architecture.
Its first Loongson 3A5000 processor chip supporting LoongArch architecture has been taped out, and a complete operating system based on the new architecture is already running stably on the 3A5000 computer.
Binary translation systems from other mainstream instruction systems to LoongArch have been demonstrated on the 3A5000 computer running complex applications based on other mainstream instruction systems.
Currently, Loongson has published the LoongArch infrastructure instruction system manual on a limited basis. Upon completion of further IP evaluation, including offshore patent analysis, Loongson will release a more complete LoongArch instruction system manual on a larger scale.
Loongson unveils in-house developed instruction set architecture LoongArch in historic breakthrough-CnTechPost
Click to expand...

Big. No need to license Intel X86, MIPS, SPARC, POWER, ARM and so on. You don't even need open ISA like RISC-V.
 
B

BlackWindMnt

Captain
Registered Member
wxw456 said:
Not a surprising development if you look back at previous Loongson chips. In 2009 the Loongson 3A1000 chip was released that supported two ISAs (MIPS64 Release 2 and LoongISA 1.0). The latest Loongson 3A4000 chip released in 2019 also supports two ISAs (MIPS64 Release 5 and LoongISA 2.0). Since 2009 Loongson has adopted a strategy of supporting the MIPS architecture as well as its own LoongISA architecture.

What is not completely clear in the article is the direction of future ISA development. The articles implies that Loongson has developed a new LoongArch architecture and will drop MIPS support in the future. That leaves two possibilities:
(1) Loongson drops MIPS and supports RISC-V and its new LoongArch ISA architecture.
(2) Loongson drops MIPS and supports just its new LoongArch ISA architecture.
Given that many other Chinese companies are evaluating and performing R&D towards RISC-V, option (1) is the most likely. I can't imagine option (2) happening because previously Loongson was never confident enough to drop support for MIPS and support its own ISA architecture.

Why is Loongson dropping MIPS support now? Simply because MIPS is not popular and the architecture already lost to ARM and x86 decades ago. RISC-V is new (lots of interest) and there are a lot of companies doing R&D with the open source ISA. Furthermore there are no dominant/established RISC-V CPU chips in the market. That means Loongson has the possibility to create the first (or early) commercial RISC-V CPU and establish a first-mover advantage. Loongson's first commercial MIPS chips in 2009 never had the same opportunity since MIPS by that time already fell out of favor.
Click to expand...
This is an interesting take on this development, I think scenario 1 is really interesting. Its one thing to design an ISA but if the market doesn't adopt to it then it will end up just like MIPS. Having RISC-V to fallback on means they are pretty much future proof.

Given how RISC-V is pretty much all green field its offers a lot of opportunity for Chinese chip companies.
 
supercat

supercat

Major
ARM does not use U.S. technologies and is not subject to U.S. sanction.

Unisoc to announce 6nm 5G T7520 chip progress on April 20​

Chinese fabless semiconductor company Unisoc said it will announce the progress of its 6nm 5G SoC Tiger T7520 on April 20.

Unisoc will hold an event that day to announce the company's operations last year and its plans for 5G and business areas this year.

Unisoc has previously announced that the Tiger T7520 will be available three months ahead of schedule, with the chip releasing in February 2020, using the 6nm EUV process for the first time.

The chip includes four Arm Cortex-A76 cores, four Arm Cortex-A55 cores, and an Arm Mali-G57 GPU, with performance equivalent to the Qualcomm Snapdragon 855 series.

It will support SA/NSA dual-mode 5G and dual SIM 5G VoNR, with 35% lower overall power consumption and 18% higher transistor density than its predecessor.

In addition, the chip has AI computing capabilities, with a 4-core ISP image processing unit and support for 100 million pixels camera.
Click to expand...
Please, Log in or Register to view URLs content!
 
Status
Not open for further replies.
Top