Gao Bin’s research group at the School of Integrated Circuits at Tsinghua University has made a major breakthrough in the field of memristor storage and calculation integrated chips that support on-chip learning.
Artificial intelligence technology supported by large computing power has greatly changed human production and lifestyle. However, the subsequent massive parameters have caused the demand for computing power to continue to rise. How to solve the huge computing power gap and achieve a substantial improvement in energy efficiency ratio is becoming increasingly urgent. As the specific carrier of computing power, high-computing power and high-energy-efficiency chips have become the core base that drives the development of this round of intelligent revolution, and are also the source of power that promotes the continuous development of human society.
Faced with the major challenge of the traditional separation of storage and calculation architecture that restricts the improvement of computing power, Professor Wu Huaqiang and Associate Professor Gao Bin of the School of Integrated Circuits focused on the research of integrated memory and calculation technology of memristor to explore and realize a new paradigm of computer systems. The integrated memory and computing technology of memristor has completely subverted the traditional von Neumann computing architecture from the underlying devices, circuit architecture and computing theory, and can achieve a leap-forward improvement in computing power and energy efficiency. At the same time, this technology can also take advantage of the learning of the underlying devices. Features support real-time on-chip learning and enable new edge training scenarios based on local learning.
Current international relevant research mainly focuses on the demonstration of learning functions at the memristor array level. However, the realization of a fully system-integrated memristor chip that supports efficient on-chip learning still faces great challenges and has not yet been achieved, mainly due to traditional The high-precision weight update method required by the backpropagation training algorithm has poor adaptability to the actual characteristics of the memristor. Specifically, firstly, due to the inherent non-ideal characteristics of memristor, to accurately update the weight, the memristor needs to be repeatedly verified and programmed, resulting in a large amount of power consumption and delay; secondly, during the weight update process, it is necessary to Different memristors impose different operating conditions, making it difficult to implement an efficient parallel conductance modulation strategy; third, the high-precision weight update calculation results in excessive overhead.
In order to solve the above problems, based on the integrated storage and calculation computing paradigm, the research team creatively proposed a new general algorithm and architecture (STELLAR) that adapts the memory and calculation integration of memristors to achieve efficient on-chip learning, effectively realizing large-scale analog memristor arrays and CMOS Through single-chip three-dimensional integration, through the whole-process collaborative innovation of algorithms, architecture, and integration methods, the world's first fully system-integrated memristor storage and computing integrated chip that supports efficient on-chip learning was developed. The chip contains all circuit modules necessary to support complete on-chip learning, successfully completed multiple on-chip incremental learning function verifications, demonstrated high adaptability, high energy efficiency, high versatility, high accuracy and other characteristics, effectively strengthening the application of smart devices in The ability to learn and adapt in actual application scenarios provides an innovative development path to break through the energy efficiency bottleneck under the traditional von Neumann computing architecture.