Assuming Chinese DUVI can take on ASML, would that dent the profits of ASML and in turn negatively impacts ASML's R&D in cutting edge tech?Great news paired with RS LASER at 100 watts then we can surmised that SSA 800 duvi is between NXT 2000i and 2050i, I can't wait for the confirmation of the mythical SSA900 22nm duvi, this machine with improved MMO will give ASML NXT2050i a run for their money.
Chinese semiconductor industry
- Thread starter Hendrik_2000
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Well to answer you truthfully IF ASML is not stupid enough to follow the US DIKTAT then it wouldn't, In business especially if you're a monopoly you never spite your favorite customer who is very rich and capable. The Chinese never used sanction cause it may create an undesirable effect, if you do it at least leave a door partially open to renew the relationship. The way ASML and the Japanese impose their restriction is very insulting, they think that the Chinese are desperate and will continue to buy an older generation DUVi in the likes of NXT1980i and Nikon knowing that the Chinese is on the verge of introducing an analogous version. Now even NXT2000i is not good enough, as the problem of scaling up production of SSA800 is being resolved.
So what will ASML do, reneged on its commitment on the US and supply China with NXT 2050i? that window of opportunity is still there for the next 2 years cause I believed the improved iteration SSA900 will be revealed next year with mass production slated in early 2025. And knowing China with Geopolitical urgency, we may see it deployed much earlier.
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The ones I mentioned are all explicitly EUV light sources for lithography. I don't see any reason why Chinese fabs wouldn't be using the EUV machines for advanced nodes, because using high NA EUV for 14nm is just a tad wasteful.
It is both...
Zhicun Technology was recognized as a national-level specialized special new little giant
The Ministry of Industry and Information Technology announced the list of the fifth batch of specialized, special-new "little giant" enterprises. Zhicun Technology, as the only chip company with integrated storage and computing, was officially included in the list of national-level specialized, special-new "little giant" enterprises.
Since 2021, "Specialized, Specialized and New" has frequently appeared in relevant meetings or documents at the central level. In March 2022, it was included in the report of the 20th National Congress of the Communist Party of China, becoming a hot spot in the industry. "Professional, refined, special and new" means that the enterprise has the characteristics of "specialization, refinement, specialization, and novelty". Relying on independent and controllable core technology to provide strong resilience for the operation of the industrial chain.
Zhicun Technology is the world's leading in-memory computing chip company. For AI application scenarios, the company is the first in the world to commercially mass-produce neural network chips based on in-memory computing technology. Relying on disruptive technological innovations, Zhicun Technology breaks through the limitations of traditional computing architectures, uses the physical integration of storage and computing to greatly reduce data handling, and improves AI computing efficiency by 2 orders of magnitude under the same process conditions, fully meeting the rapidly developing neural network model Exponentially growing computing power requirements.
Altron Photonics won the B round of investment to create a femtosecond "China's ultra-fast light source"
Recently, Dingxing Quantum completed the B-round investment in Altron Photonics Technology Co., Ltd., a research and development manufacturer of industrial-grade femtosecond laser light source and its core components. Dingxing Quantum said that Altron Photonics has been committed to solving the core material and process module problems since its establishment, and has accumulated rich experience in product development and application, sinking the process into the device, effectively reducing the cost of femtosecond lasers and improving To ensure the stability and reliability of the product, we look forward to this round of financing to help the company develop rapidly and make new contributions to the domestically produced and controllable ultrafast femtosecond lasers.
Recently, Dingxing Quantum completed the B-round investment in Altron Photonics Technology Co., Ltd., a research and development manufacturer of industrial-grade femtosecond laser light source and its core components. Dingxing Quantum said that Altron Photonics has been committed to solving the core material and process module problems since its establishment, and has accumulated rich experience in product development and application, sinking the process into the device, effectively reducing the cost of femtosecond lasers and improving To ensure the stability and reliability of the product, we look forward to this round of financing to help the company develop rapidly and make new contributions to the domestically produced and controllable ultrafast femtosecond lasers.
The investment exceeds 2.8 billion! Xinhua Semiconductor's 10,000-ton electronic-grade polysilicon project is expected to be completed by the end of September
Recently, Inner Mongolia Xinhua Semiconductor Technology Co., Ltd. has made new progress in the 10,000-ton semiconductor-grade polysilicon project.
According to the news from Xinsaihan V, the project has entered the equipment installation stage, and the overall progress of the project has been completed by 85%. It is expected to be completed by the end of September this year, and it will be commissioned and put into operation in October.
Xinhua's 10,000-ton semiconductor-grade polysilicon project has a total investment of 2.83 billion yuan and will start construction in September 2022. It covers an area of about 324 acres and has 1,100 sets of total equipment. It can produce 10,000 tons of high-purity electronic-grade polysilicon and dichlorodihydrosilicon annually. 500 tons, 3,000 tons of trichlorosilane, and 3,000 tons of silicon tetrachloride.
It is reported that the project is planned to reach full capacity by the end of 2024.
Tianyan Check shows that the controlling shareholder of Inner Mongolia Xinhua Semiconductor Technology Co., Ltd. is Jiangsu Xinhua Semiconductor Technology Co., Ltd. Jiangsu Xinhua Semiconductor Technology Co., Ltd. was established in Xuzhou, Jiangsu in 2015. It is the first enterprise in China to systematically master the preparation technology of high-purity electronic-grade polysilicon. In July this year, the company was successfully selected as a national specialized and new "little giant" enterprise.
CAS Microelectronics has made progress in the field of 28nm RRAM in-memory computing circuits
The rapid development of the Internet of Things and artificial intelligence technology has put forward higher requirements for the real-time data processing capability and energy efficiency of the edge node computing platform. The non-volatile in-memory computing technology based on the new memory can realize the in-situ storage and calculation of data, and minimize the power consumption and delay overhead caused by data transfer, thereby greatly improving the data processing capability and performance ratio of edge devices. However, non-volatile in-memory computing still faces limitations in computing performance and energy efficiency due to non-ideal factors in the characteristics of the basic unit, parasitic effects in the array, and the hardware overhead of the analog-to-digital conversion circuit. Focusing on the above key issues, the team of academician Liu Ming of the Institute of Microelectronics adopted a cross-level collaborative design method to propose a new RRAM in-memory computing structure with high parallelism and high performance ratio.
At the device level, the research team proposed a memory-computing array structure with a weighted two-transistor-memristor ( WH-2T1R ). The WH-2T1R structure uses core transistors to form a decoupled storage and calculation data path to reduce the impact of parasitic effects on the calculation current. Compared with the 1T1R structure, it only causes an additional 30.3% area overhead. The calculation unit utilizes the amplification characteristics of the second transistor sub-threshold region to increase the calculation switching ratio by 13.5 times while reducing the calculation current in the low-resistance state by 88% , thereby achieving a 63.4% reduction in the power consumption of the multiply-add operation. Thanks to the improvement of the calculation switch ratio, the RRAM memory calculation structure can support higher input parallelism and multi-bit multiplication and addition operations.
At the circuit level, the research team proposed a readout circuit for a reference current subtraction current-type sense amplifier. The reference current subtraction branch first subtracts the input current according to the last readout result and then sends it to the current mirror to read out the data. The reference current subtraction branch reduces the input current range of the current mirror in half, doubles the calculation current range supported by the RRAM storage and calculation structure, and can achieve higher input parallelism and multi-bit multiplication and addition, and achieve 79.5% of the power consumption of the readout circuit reduce. By further optimizing the current subtraction configuration of the current-type sensitive amplifier, the research team achieved a 5 -fold increase in the integral nonlinear error and a 3.75 -fold increase in the differential nonlinear error .
At the level of algorithm mapping, the research team proposed a high data redundancy ( MSB_RSM ) mapping strategy. The RRAM in-memory computing structure is equipped with multiple sets of arrays with different second transistor multiplier parameters and an additional set of redundant arrays. Wherein different second transistors are used to map different bits of the multi-bit weight value. Since the impact of RRAM and transistor non-ideal factors on the calculation current cannot be ignored, redundant arrays are used for additional mapping weights to compensate for non-ideal factors. After analyzing the compensation effects of different bits, MSB-RSM can reduce the 1σ error by 40% when operating on high-bit weights . Thanks to the more stable calculation current, the CIFAR-10 and CIFAR-100 tasks under the ResNet-18 model have achieved 0.96% and 2.83% accuracy improvements.
The above scheme has been verified on the embedded 28nm process independently developed by the team . The new RRAM in-memory computing structure supports highly parallel analog domain multiplication and addition operations. In the ResNet-18 task with 1 -bit input, 3 -bit weight, and 4- bit output The average energy efficiency reaches 30.34TOPS/W , and can be increased to 154.04TOPS/W by further optimizing the readout timing . This work provides a new idea for high-energy-efficiency, high-precision analog in-memory computing through the system design of units, circuits, and systems.
At the device level, the research team proposed a memory-computing array structure with a weighted two-transistor-memristor ( WH-2T1R ). The WH-2T1R structure uses core transistors to form a decoupled storage and calculation data path to reduce the impact of parasitic effects on the calculation current. Compared with the 1T1R structure, it only causes an additional 30.3% area overhead. The calculation unit utilizes the amplification characteristics of the second transistor sub-threshold region to increase the calculation switching ratio by 13.5 times while reducing the calculation current in the low-resistance state by 88% , thereby achieving a 63.4% reduction in the power consumption of the multiply-add operation. Thanks to the improvement of the calculation switch ratio, the RRAM memory calculation structure can support higher input parallelism and multi-bit multiplication and addition operations.
At the circuit level, the research team proposed a readout circuit for a reference current subtraction current-type sense amplifier. The reference current subtraction branch first subtracts the input current according to the last readout result and then sends it to the current mirror to read out the data. The reference current subtraction branch reduces the input current range of the current mirror in half, doubles the calculation current range supported by the RRAM storage and calculation structure, and can achieve higher input parallelism and multi-bit multiplication and addition, and achieve 79.5% of the power consumption of the readout circuit reduce. By further optimizing the current subtraction configuration of the current-type sensitive amplifier, the research team achieved a 5 -fold increase in the integral nonlinear error and a 3.75 -fold increase in the differential nonlinear error .
At the level of algorithm mapping, the research team proposed a high data redundancy ( MSB_RSM ) mapping strategy. The RRAM in-memory computing structure is equipped with multiple sets of arrays with different second transistor multiplier parameters and an additional set of redundant arrays. Wherein different second transistors are used to map different bits of the multi-bit weight value. Since the impact of RRAM and transistor non-ideal factors on the calculation current cannot be ignored, redundant arrays are used for additional mapping weights to compensate for non-ideal factors. After analyzing the compensation effects of different bits, MSB-RSM can reduce the 1σ error by 40% when operating on high-bit weights . Thanks to the more stable calculation current, the CIFAR-10 and CIFAR-100 tasks under the ResNet-18 model have achieved 0.96% and 2.83% accuracy improvements.
The above scheme has been verified on the embedded 28nm process independently developed by the team . The new RRAM in-memory computing structure supports highly parallel analog domain multiplication and addition operations. In the ResNet-18 task with 1 -bit input, 3 -bit weight, and 4- bit output The average energy efficiency reaches 30.34TOPS/W , and can be increased to 154.04TOPS/W by further optimizing the readout timing . This work provides a new idea for high-energy-efficiency, high-precision analog in-memory computing through the system design of units, circuits, and systems.
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