Chinese semiconductor industry
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Another sneaky Indian ceo, he wants to invest in India instead?
It is just packaging plant, not fabricating plant. Does the US worry about Indian chips prowess?
In the era of high computing power, high-performance packaging carries IC industry innovation
From the outbreak of large-scale AI to the popularization of high-density and complex computing in multiple industries, the demand for high-computing chips has been driven up. As a result, some new development trends have emerged in computing infrastructure, such as cloud computing dedicated chips, high-performance edge computing equipment, etc. The rapid development of these new application scenarios, together with the stock computing power market, constitute the blue ocean of the future market for chip manufacturing.
At present, the semiconductor industry chain is committed to solving the demand for computing power and the cost pressure behind it. In the manufacturing process of finished chips, chiplet technology has become an important choice in emerging high-computing demand scenarios—for example, in the fields of AI and cloud computing, chiplet-related technologies can be used to build dense computing with higher computing power density and better cost. Computing clusters significantly improve the cost performance of high-performance computing (HPC) applications.
As the world's leading integrated circuit manufacturing and technical service provider, JCET has accumulated rich experience in the field of Chiplet R&D and manufacturing. JCET believes that Moore’s Law, which currently uses transistor scaling technology to improve chip performance, has encountered a bottleneck, and the market’s demand for high computing power and high-performance chips in the AI era has increased. 2.5D/3D Chiplet packaging, high-density SiP, etc. High-performance packaging technology will become an important engine to promote chip performance.
Using high-performance packaging technology, hardware with different processes, different manufacturers, and different functions (such as CPU, GPU, FPGA, AI accelerator, etc.) can be integrated to work efficiently through high-density interconnection, thereby further releasing computing power and supporting AI. , The rapid development of the field of high performance computing.
For high-performance computing, JCET launched the Chiplet high-performance packaging technology platform XDFOI™, which uses the concept of collaborative design to realize the integration of chip product integration and testing, covering 2D, 2.5D, and 3D Chiplet integration technologies. Its application scenarios are mainly concentrated in FPGA, CPU, GPU, AI and 5G network chips, etc., which have high requirements for integration and computing power, provide customers with finished chip manufacturing solutions with thinner appearance, faster data transmission rate and lower power loss.
At the same time, chiplet packaging in heterogeneous heterogeneous SiP integration can break through many challenges faced by traditional SoC manufacturing (mask size limit and function limit, etc.), thereby greatly improving chip yield and helping to reduce design complexity and design costs. And reduce the cost of chip manufacturing. While Chiplet also inherits the IP reusability of SoC, it further opens up a new reuse mode of semiconductor IP, thereby shortening the time to market of chips.
At present, JCET's XDFOI™ Chiplet series process has achieved stable mass production, and can provide turnkey services from design to production, helping customers significantly improve chip system integration. At the same time, the company continues to invest in the development of diversified solutions related to computing power chips and the construction of related production capacity, and accelerates the active transformation of the finished chip manufacturing process to high performance and the intelligent upgrade of production line automation, fully preparing for the growth of application demand.
At present, the semiconductor industry chain is committed to solving the demand for computing power and the cost pressure behind it. In the manufacturing process of finished chips, chiplet technology has become an important choice in emerging high-computing demand scenarios—for example, in the fields of AI and cloud computing, chiplet-related technologies can be used to build dense computing with higher computing power density and better cost. Computing clusters significantly improve the cost performance of high-performance computing (HPC) applications.
As the world's leading integrated circuit manufacturing and technical service provider, JCET has accumulated rich experience in the field of Chiplet R&D and manufacturing. JCET believes that Moore’s Law, which currently uses transistor scaling technology to improve chip performance, has encountered a bottleneck, and the market’s demand for high computing power and high-performance chips in the AI era has increased. 2.5D/3D Chiplet packaging, high-density SiP, etc. High-performance packaging technology will become an important engine to promote chip performance.
Using high-performance packaging technology, hardware with different processes, different manufacturers, and different functions (such as CPU, GPU, FPGA, AI accelerator, etc.) can be integrated to work efficiently through high-density interconnection, thereby further releasing computing power and supporting AI. , The rapid development of the field of high performance computing.
For high-performance computing, JCET launched the Chiplet high-performance packaging technology platform XDFOI™, which uses the concept of collaborative design to realize the integration of chip product integration and testing, covering 2D, 2.5D, and 3D Chiplet integration technologies. Its application scenarios are mainly concentrated in FPGA, CPU, GPU, AI and 5G network chips, etc., which have high requirements for integration and computing power, provide customers with finished chip manufacturing solutions with thinner appearance, faster data transmission rate and lower power loss.
At the same time, chiplet packaging in heterogeneous heterogeneous SiP integration can break through many challenges faced by traditional SoC manufacturing (mask size limit and function limit, etc.), thereby greatly improving chip yield and helping to reduce design complexity and design costs. And reduce the cost of chip manufacturing. While Chiplet also inherits the IP reusability of SoC, it further opens up a new reuse mode of semiconductor IP, thereby shortening the time to market of chips.
At present, JCET's XDFOI™ Chiplet series process has achieved stable mass production, and can provide turnkey services from design to production, helping customers significantly improve chip system integration. At the same time, the company continues to invest in the development of diversified solutions related to computing power chips and the construction of related production capacity, and accelerates the active transformation of the finished chip manufacturing process to high performance and the intelligent upgrade of production line automation, fully preparing for the growth of application demand.
It is understood that the key project of the Chengdu Science City Science and Technology Innovation Project "Kilowatt Extreme Ultraviolet Free Electron Laser Source and Photolithography Verification Device" is undertaken by the Tenth Research Institute of the Chinese Academy of Engineering Physics, with a total investment of about 4.1 billion yuan. Extreme ultraviolet free electron laser light source and lithography verification device", establish a high-power extreme ultraviolet light source, through the lithography light source pretreatment system and lithography verification system, verify various key physical and engineering issues of free electron laser used in lithography, Completed the 10nm node lithography demonstration and verification, established the first kilowatt extreme ultraviolet lithography engineering test prototype, and provided conditions for China to master large-scale extreme ultraviolet lithography (EUV) production capacity and break through the "stuck neck" problem of chip manufacturing. The project is planned to start construction in 2021 and complete acceptance by the end of 2026.
Well, damn. Looks like this is another frontrunner in the EUV light source development race. Whatever EUVl machine comes out in the next few years certainly won't be starved for light source options.
Topband Hongji received tens of millions of investment, focusing on 8/12-inch semiconductor quartz consumables, etc.
Recently, Fosun Chuangfu completed an industrial investment of tens of millions of yuan in Liaoning Topband Hongji Semiconductor Materials Co., Ltd. Localization of consumables.
According to information from Fosun Chuangfu, Topband Hongji was established in May 2017. Its main business is the research and development, production and sales of 8-inch and 12-inch semiconductor quartz products and photovoltaic quartz products. The products are widely used in the production of semiconductor chips and solar energy. In the fields of photovoltaic, optical fiber, LED, electric light source, etc., the core team has a profound industrial background, with an average of more than 15 years of experience in the semiconductor quartz product industry. Since its establishment, Topband Hongji has developed a new production process based on the traditional production process, under the guidance of the semiconductor localization policy, combined with modern intelligent manufacturing technology, and realized an intelligent and automated production mode.
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