Recently, the capping ceremony of the third-generation semiconductor compound wafer substrate project undertaken by CSCEC was successfully held. Hu Xiongwei, deputy secretary and general manager of CSCEC, Zhang Yulei, manager of Shandong Branch, and leaders of Qingdao Huaxin Jingyuan Semiconductor Technology Co., Ltd. and Qingdao Commercial Construction Supervision Co., Ltd. attended the ceremony.
The third-generation semiconductor compound wafer substrate project is a key project in Qingdao. After completion, it will provide important support for promoting the development of the domestic semiconductor industry and regional economic construction.
During the construction process, the project has always been adhering to the leadership of the party building, high-quality construction, the implementation of quality management process control, strict implementation of construction specifications and quality standards, and promote high-quality construction of the project.
The project has always adhered to high-quality construction as the core, technological innovation as the driving force, and fully promoted construction and production. Overcoming technical difficulties such as tall formwork and deep foundation pits, the 2# underground garage with a construction area of 3,669 square meters was successfully capped in only 25 days. While the project continues to promote efficient performance of the contract, it has achieved fruitful scientific and technological innovations, published 1 paper, obtained 1 patent, 1 invention patent and 1 construction method.
The project adheres to safety first and prevention first, takes safety management as the top priority of construction, strengthens the red line awareness of safety production, strictly implements the safety production responsibility system, and clearly defines the person responsible for safety production, responsible post, and responsibility area, and implements the normal state Education, training, supervision and assessment of safe production.
The third-generation semiconductor compound wafer substrate project is located in the north of Kehai Road, south of Keyun Road, east of Planning East Line 22, and west of Huaguan Road, Qingdao High-tech Zone, with a construction area of 62,000 square meters.